source: ctrl/firmware/Main/SES/Wiznet/Ethernet/wizchip_conf.c @ 79

Last change on this file since 79 was 79, checked in by Zed, 3 months ago

DHCP client can get IP-address from fritz!box
File size: 24.6 KB
Line 
1//****************************************************************************/
2//!
3//! \file wizchip_conf.c
4//! \brief WIZCHIP Config Header File.
5//! \version 1.0.1
6//! \date 2013/10/21
7//! \par  Revision history
8//!       <2015/02/05> Notice
9//!        The version history is not updated after this point.
10//!        Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
11//!        >> https://github.com/Wiznet/ioLibrary_Driver
12//!       <2014/05/01> V1.0.1  Refer to M20140501
13//!        1. Explicit type casting in wizchip_bus_readdata() & wizchip_bus_writedata()
14//            Issued by Mathias ClauBen.
15//!           uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
16//!           For remove the warning when pointer type size is not 32bit.
17//!           If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
18//!       <2013/10/21> 1st Release
19//! \author MidnightCow
20//! \copyright
21//!
22//! Copyright (c)  2013, WIZnet Co., LTD.
23//! All rights reserved.
24//!
25//! Redistribution and use in source and binary forms, with or without
26//! modification, are permitted provided that the following conditions
27//! are met:
28//!
29//!     * Redistributions of source code must retain the above copyright
30//! notice, this list of conditions and the following disclaimer.
31//!     * Redistributions in binary form must reproduce the above copyright
32//! notice, this list of conditions and the following disclaimer in the
33//! documentation and/or other materials provided with the distribution.
34//!     * Neither the name of the <ORGANIZATION> nor the names of its
35//! contributors may be used to endorse or promote products derived
36//! from this software without specific prior written permission.
37//!
38//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
39//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
41//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
42//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
48//! THE POSSIBILITY OF SUCH DAMAGE.
49//
50//*****************************************************************************/
51//A20140501 : for use the type - ptrdiff_t
52#include <stddef.h>
53//
54
55#include "spi.h"
56
57#include "wizchip_conf.h"
58
59
60/////////////
61//M20150401 : Remove ; in the default callback function such as wizchip_cris_enter(), wizchip_cs_select() and etc.
62/////////////
63
64/**
65 * @brief Default function to enable interrupt.
66 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
67 * null function is called.
68 */
69//void    wizchip_cris_enter(void)           {};
70void      wizchip_cris_enter(void)           {}
71
72/**
73 * @brief Default function to disable interrupt.
74 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
75 * null function is called.
76 */
77//void    wizchip_cris_exit(void)          {};
78void      wizchip_cris_exit(void)          {}
79
80/**
81 * @brief Default function to select chip.
82 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
83 * null function is called.
84 */
85//void  wizchip_cs_select(void)            {};
86void    wizchip_cs_select(void)
87{
88        HAL_GPIO_WritePin(ETH_SPI_NSS_GPIO_Port, ETH_SPI_NSS_Pin, GPIO_PIN_RESET);
89}
90
91/**
92 * @brief Default function to deselect chip.
93 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
94 * null function is called.
95 */
96//void  wizchip_cs_deselect(void)          {};
97void    wizchip_cs_deselect(void)
98{
99        HAL_GPIO_WritePin(ETH_SPI_NSS_GPIO_Port, ETH_SPI_NSS_Pin, GPIO_PIN_SET);
100}
101
102/**
103 * @brief Default function to read in direct or indirect interface.
104 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
105 * null function is called.
106 */
107 //M20150601 : Rename the function for integrating with W5300
108//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
109iodata_t wizchip_bus_readdata(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
110
111/**
112 * @brief Default function to write in direct or indirect interface.
113 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
114 * null function is called.
115 */
116//M20150601 : Rename the function for integrating with W5300
117//void  wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb)  { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
118void    wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb)  { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
119
120/**
121 * @brief Default function to read in SPI interface.
122 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
123 * null function is called.
124 */
125//uint8_t wizchip_spi_readbyte(void)        {return 0;};
126uint8_t wizchip_spi_readbyte(void)
127{
128        uint8_t data = 0;
129        while(HAL_SPI_GetState(&hspi2)!=HAL_SPI_STATE_READY);
130        HAL_SPI_Receive(&hspi2, &data, 1, 100);  // Generating Clocking on SCK pin to read exactly one byte
131        return data;
132}
133
134/**
135 * @brief Default function to write in SPI interface.
136 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
137 * null function is called.
138 */
139//void  wizchip_spi_writebyte(uint8_t wb) {};
140void    wizchip_spi_writebyte(uint8_t wb)
141{
142        while(HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
143        HAL_SPI_Transmit(&hspi2, &wb, 1, 100);  // Generating Clocking on SCK pin to read exactly one byte
144}
145
146/**
147 * @brief Default function to burst read in SPI interface.
148 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
149 * null function is called.
150 */
151//void  wizchip_spi_readburst(uint8_t* pBuf, uint16_t len)      {};
152void    wizchip_spi_readburst(uint8_t* pBuf, uint16_t len)
153{
154        while(HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
155        HAL_SPI_Receive(&hspi2, pBuf, len, 100);
156}
157
158/**
159 * @brief Default function to burst write in SPI interface.
160 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
161 * null function is called.
162 */
163//void  wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {};
164void    wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len)
165{
166        while(HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
167        HAL_SPI_Transmit(&hspi2, pBuf, len, 100);
168        /*while(HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY &&
169                  HAL_DMA_GetState(hspi2.hdmarx) != HAL_DMA_STATE_READY && HAL_DMA_GetState(hspi2.hdmatx) != HAL_DMA_STATE_READY);
170
171        HAL_SPI_Transmit_DMA(&hspi2, pBuf, len);
172
173        while (HAL_DMA_GetState(hspi2.hdmarx) == HAL_DMA_STATE_BUSY|| HAL_DMA_GetState(hspi2.hdmarx) == HAL_DMA_STATE_RESET);
174        while (HAL_DMA_GetState(hspi2.hdmatx) == HAL_DMA_STATE_BUSY|| HAL_DMA_GetState(hspi2.hdmatx) == HAL_DMA_STATE_RESET);
175
176        return;*/
177}
178
179/**
180 * @\ref _WIZCHIP instance
181 */
182//
183//M20150401 : For a compiler didnot support a member of structure
184//            Replace the assignment of struct members with the assingment of array
185//
186
187_WIZCHIP  WIZCHIP =
188{
189      .id                  = _WIZCHIP_ID_,
190      .if_mode             = _WIZCHIP_IO_MODE_,
191      .CRIS._enter         = wizchip_cris_enter,
192      .CRIS._exit          = wizchip_cris_exit,
193      .CS._select          = wizchip_cs_select,
194      .CS._deselect        = wizchip_cs_deselect,
195      .IF.SPI._read_byte   = wizchip_spi_readbyte,
196      .IF.SPI._write_byte  = wizchip_spi_writebyte,
197          .IF.SPI._read_burst   = wizchip_spi_readburst,
198          .IF.SPI._write_burst  = wizchip_spi_writeburst,
199};
200
201/*_WIZCHIP  WIZCHIP =
202{
203    _WIZCHIP_IO_MODE_,
204    _WIZCHIP_ID_ ,
205    {
206        wizchip_cris_enter,
207        wizchip_cris_exit
208    },
209    {
210        wizchip_cs_select,
211        wizchip_cs_deselect
212    },
213    {
214        {
215            //M20150601 : Rename the function
216            //wizchip_bus_readbyte,
217            //wizchip_bus_writebyte
218            wizchip_bus_readdata,
219            wizchip_bus_writedata
220        },
221
222    }
223};*/
224
225
226static uint8_t    _DNS_[4];      // DNS server ip address
227static dhcp_mode  _DHCP_;        // DHCP mode
228
229void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
230{
231   if(!cris_en || !cris_ex)
232   {
233      WIZCHIP.CRIS._enter = wizchip_cris_enter;
234      WIZCHIP.CRIS._exit  = wizchip_cris_exit;
235   }
236   else
237   {
238      WIZCHIP.CRIS._enter = cris_en;
239      WIZCHIP.CRIS._exit  = cris_ex;
240   }
241}
242
243void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
244{
245   if(!cs_sel || !cs_desel)
246   {
247      WIZCHIP.CS._select   = wizchip_cs_select;
248      WIZCHIP.CS._deselect = wizchip_cs_deselect;
249   }
250   else
251   {
252      WIZCHIP.CS._select   = cs_sel;
253      WIZCHIP.CS._deselect = cs_desel;
254   }
255}
256
257//M20150515 : For integrating with W5300
258//void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
259void reg_wizchip_bus_cbfunc(iodata_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb))
260{
261   while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
262   //M20150601 : Rename call back function for integrating with W5300
263   /*
264   if(!bus_rb || !bus_wb)
265   {
266      WIZCHIP.IF.BUS._read_byte   = wizchip_bus_readbyte;
267      WIZCHIP.IF.BUS._write_byte  = wizchip_bus_writebyte;
268   }
269   else
270   {
271      WIZCHIP.IF.BUS._read_byte   = bus_rb;
272      WIZCHIP.IF.BUS._write_byte  = bus_wb;
273   }
274   */
275   if(!bus_rb || !bus_wb)
276   {
277      WIZCHIP.IF.BUS._read_data   = wizchip_bus_readdata;
278      WIZCHIP.IF.BUS._write_data  = wizchip_bus_writedata;
279   }
280   else
281   {
282      WIZCHIP.IF.BUS._read_data   = bus_rb;
283      WIZCHIP.IF.BUS._write_data  = bus_wb;
284   }
285}
286
287void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
288{
289   while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
290
291   if(!spi_rb || !spi_wb)
292   {
293      WIZCHIP.IF.SPI._read_byte   = wizchip_spi_readbyte;
294      WIZCHIP.IF.SPI._write_byte  = wizchip_spi_writebyte;
295   }
296   else
297   {
298      WIZCHIP.IF.SPI._read_byte   = spi_rb;
299      WIZCHIP.IF.SPI._write_byte  = spi_wb;
300   }
301}
302
303// 20140626 Eric Added for SPI burst operations
304void reg_wizchip_spiburst_cbfunc(void (*spi_rb)(uint8_t* pBuf, uint16_t len), void (*spi_wb)(uint8_t* pBuf, uint16_t len))
305{
306   while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
307
308   if(!spi_rb || !spi_wb)
309   {
310      WIZCHIP.IF.SPI._read_burst   = wizchip_spi_readburst;
311      WIZCHIP.IF.SPI._write_burst  = wizchip_spi_writeburst;
312   }
313   else
314   {
315      WIZCHIP.IF.SPI._read_burst   = spi_rb;
316      WIZCHIP.IF.SPI._write_burst  = spi_wb;
317   }
318}
319
320int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
321{
322#if     _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
323   uint8_t tmp = 0;
324#endif
325   uint8_t* ptmp[2] = {0,0};
326   switch(cwtype)
327   {
328      case CW_RESET_WIZCHIP:
329         wizchip_sw_reset();
330         break;
331      case CW_INIT_WIZCHIP:
332         if(arg != 0)
333         {
334            ptmp[0] = (uint8_t*)arg;
335            ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
336         }
337         return wizchip_init(ptmp[0], ptmp[1]);
338      case CW_CLR_INTERRUPT:
339         wizchip_clrinterrupt(*((intr_kind*)arg));
340         break;
341      case CW_GET_INTERRUPT:
342        *((intr_kind*)arg) = wizchip_getinterrupt();
343         break;
344      case CW_SET_INTRMASK:
345         wizchip_setinterruptmask(*((intr_kind*)arg));
346         break;
347      case CW_GET_INTRMASK:
348         *((intr_kind*)arg) = wizchip_getinterruptmask();
349         break;
350   //M20150601 : This can be supported by W5200, W5500
351   //#if _WIZCHIP_ > W5100
352   #if (_WIZCHIP_ == W5200 || _WIZCHIP_ == W5500)
353      case CW_SET_INTRTIME:
354         setINTLEVEL(*(uint16_t*)arg);
355         break;
356      case CW_GET_INTRTIME:
357         *(uint16_t*)arg = getINTLEVEL();
358         break;
359   #endif
360      case CW_GET_ID:
361         ((uint8_t*)arg)[0] = WIZCHIP.id[0];
362         ((uint8_t*)arg)[1] = WIZCHIP.id[1];
363         ((uint8_t*)arg)[2] = WIZCHIP.id[2];
364         ((uint8_t*)arg)[3] = WIZCHIP.id[3];
365         ((uint8_t*)arg)[4] = WIZCHIP.id[4];
366         ((uint8_t*)arg)[5] = WIZCHIP.id[5];
367         ((uint8_t*)arg)[6] = 0;
368         break;
369   #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5500
370      case CW_RESET_PHY:
371         wizphy_reset();
372         break;
373      case CW_SET_PHYCONF:
374         wizphy_setphyconf((wiz_PhyConf*)arg);
375         break;
376      case CW_GET_PHYCONF:
377         wizphy_getphyconf((wiz_PhyConf*)arg);
378         break;
379      case CW_GET_PHYSTATUS:
380         break;
381      case CW_SET_PHYPOWMODE:
382         return wizphy_setphypmode(*(uint8_t*)arg);
383   #endif
384   #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
385      case CW_GET_PHYPOWMODE:
386         tmp = wizphy_getphypmode();
387         if((int8_t)tmp == -1) return -1;
388         *(uint8_t*)arg = tmp;
389         break;
390      case CW_GET_PHYLINK:
391         tmp = wizphy_getphylink();
392         if((int8_t)tmp == -1) return -1;
393         *(uint8_t*)arg = tmp;
394         break;
395   #endif
396      default:
397         return -1;
398   }
399   return 0;
400}
401
402
403int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
404{
405
406   switch(cntype)
407   {
408      case CN_SET_NETINFO:
409         wizchip_setnetinfo((wiz_NetInfo*)arg);
410         break;
411      case CN_GET_NETINFO:
412         wizchip_getnetinfo((wiz_NetInfo*)arg);
413         break;
414      case CN_SET_NETMODE:
415         return wizchip_setnetmode(*(netmode_type*)arg);
416      case CN_GET_NETMODE:
417         *(netmode_type*)arg = wizchip_getnetmode();
418         break;
419      case CN_SET_TIMEOUT:
420         wizchip_settimeout((wiz_NetTimeout*)arg);
421         break;
422      case CN_GET_TIMEOUT:
423         wizchip_gettimeout((wiz_NetTimeout*)arg);
424         break;
425      default:
426         return -1;
427   }
428   return 0;
429}
430
431void wizchip_sw_reset(void)
432{
433   uint8_t gw[4], sn[4], sip[4];
434   uint8_t mac[6];
435//A20150601
436#if _WIZCHIP_IO_MODE_  == _WIZCHIP_IO_MODE_BUS_INDIR_
437   uint16_t mr = (uint16_t)getMR();
438   setMR(mr | MR_IND);
439#endif
440//
441   getSHAR(mac);
442   getGAR(gw);  getSUBR(sn);  getSIPR(sip);
443   setMR(MR_RST);
444   getMR(); // for delay
445//A2015051 : For indirect bus mode
446#if _WIZCHIP_IO_MODE_  == _WIZCHIP_IO_MODE_BUS_INDIR_
447   setMR(mr | MR_IND);
448#endif
449//
450   setSHAR(mac);
451   setGAR(gw);
452   setSUBR(sn);
453   setSIPR(sip);
454}
455
456int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
457{
458   int8_t i;
459#if _WIZCHIP_ < W5200
460   int8_t j;
461#endif
462   int8_t tmp = 0;
463   wizchip_sw_reset();
464   if(txsize)
465   {
466      tmp = 0;
467//M20150601 : For integrating with W5300
468#if _WIZCHIP_ == W5300
469                for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
470                {
471                        if(txsize[i] > 64) return -1;   //No use 64KB even if W5300 support max 64KB memory allocation
472                        tmp += txsize[i];
473                        if(tmp > 128) return -1;
474                }
475                if(tmp % 8) return -1;
476#else
477                for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
478                {
479                        tmp += txsize[i];
480
481#if _WIZCHIP_ < W5200   //2016.10.28 peter add condition for w5100 and w5100s
482                        if(tmp > 8) return -1;
483#else
484                        if(tmp > 16) return -1;
485#endif
486                }
487#endif
488                for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
489                {
490#if _WIZCHIP_ < W5200   //2016.10.28 peter add condition for w5100
491                        j = 0;
492                        while((txsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
493                        setSn_TXBUF_SIZE(i, j);
494#else
495                        setSn_TXBUF_SIZE(i, txsize[i]);
496#endif
497                }
498   }
499
500   if(rxsize)
501   {
502      tmp = 0;
503#if _WIZCHIP_ == W5300
504      for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
505                {
506                        if(rxsize[i] > 64) return -1;   //No use 64KB even if W5300 support max 64KB memory allocation
507                        tmp += rxsize[i];
508                        if(tmp > 128) return -1;
509                }
510                if(tmp % 8) return -1;
511#else
512                for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
513                {
514                        tmp += rxsize[i];
515#if _WIZCHIP_ < W5200   //2016.10.28 peter add condition for w5100 and w5100s
516                        if(tmp > 8) return -1;
517#else
518                        if(tmp > 16) return -1;
519#endif
520                }
521#endif
522                for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
523                {
524#if _WIZCHIP_ < W5200   // add condition for w5100
525                        j = 0;
526                        while((rxsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
527                        setSn_RXBUF_SIZE(i, j);
528#else
529                        setSn_RXBUF_SIZE(i, rxsize[i]);
530#endif
531                }
532   }
533   return 0;
534}
535
536void wizchip_clrinterrupt(intr_kind intr)
537{
538   uint8_t ir  = (uint8_t)intr;
539   uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
540#if _WIZCHIP_ < W5500
541   ir |= (1<<4); // IK_WOL
542#endif
543#if _WIZCHIP_ == W5200
544   ir |= (1 << 6);
545#endif
546
547#if _WIZCHIP_ < W5200
548   sir &= 0x0F;
549#endif
550
551#if _WIZCHIP_ <= W5100S
552   ir |= sir;
553   setIR(ir);
554//A20150601 : For integrating with W5300
555#elif _WIZCHIP_ == W5300
556   setIR( ((((uint16_t)ir) << 8) | (((uint16_t)sir) & 0x00FF)) );
557#else
558   setIR(ir);
559//M20200227 : For clear
560   //setSIR(sir);
561   for(ir=0; ir<8; ir++){
562       if(sir & (0x01 <<ir) ) setSn_IR(ir, 0xff);
563   }
564
565#endif
566}
567
568intr_kind wizchip_getinterrupt(void)
569{
570   uint8_t ir  = 0;
571   uint8_t sir = 0;
572   uint16_t ret = 0;
573#if _WIZCHIP_ <= W5100S
574   ir = getIR();
575   sir = ir & 0x0F;
576//A20150601 : For integrating with W5300
577#elif _WIZCHIP_  == W5300
578   ret = getIR();
579   ir = (uint8_t)(ret >> 8);
580   sir = (uint8_t)ret;
581#else
582   ir  = getIR();
583   sir = getSIR();
584#endif
585
586//M20150601 : For Integrating with W5300
587//#if _WIZCHIP_ < W5500
588#if _WIZCHIP_ < W5200
589   ir &= ~(1<<4); // IK_WOL
590#endif
591#if _WIZCHIP_ == W5200
592   ir &= ~(1 << 6);
593#endif
594  ret = sir;
595  ret = (ret << 8) + ir;
596  return (intr_kind)ret;
597}
598
599void wizchip_setinterruptmask(intr_kind intr)
600{
601   uint8_t imr  = (uint8_t)intr;
602   uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
603#if _WIZCHIP_ < W5500
604   imr &= ~(1<<4); // IK_WOL
605#endif
606#if _WIZCHIP_ == W5200
607   imr &= ~(1 << 6);
608#endif
609
610#if _WIZCHIP_ < W5200
611   simr &= 0x0F;
612   imr |= simr;
613   setIMR(imr);
614//A20150601 : For integrating with W5300
615#elif _WIZCHIP_ == W5300
616   setIMR( ((((uint16_t)imr) << 8) | (((uint16_t)simr) & 0x00FF)) );
617#else
618   setIMR(imr);
619   setSIMR(simr);
620#endif
621}
622
623intr_kind wizchip_getinterruptmask(void)
624{
625   uint8_t imr  = 0;
626   uint8_t simr = 0;
627   uint16_t ret = 0;
628#if _WIZCHIP_ < W5200
629   imr  = getIMR();
630   simr = imr & 0x0F;
631//A20150601 : For integrating with W5300
632#elif _WIZCHIP_ == W5300
633   ret = getIMR();
634   imr = (uint8_t)(ret >> 8);
635   simr = (uint8_t)ret;
636#else
637   imr  = getIMR();
638   simr = getSIMR();
639#endif
640
641#if _WIZCHIP_ < W5500
642   imr &= ~(1<<4); // IK_WOL
643#endif
644#if _WIZCHIP_ == W5200
645   imr &= ~(1 << 6);  // IK_DEST_UNREACH
646#endif
647  ret = simr;
648  ret = (ret << 8) + imr;
649  return (intr_kind)ret;
650}
651
652int8_t wizphy_getphylink(void)
653{
654   int8_t tmp = PHY_LINK_OFF;
655#if _WIZCHIP_ == W5100S
656   if(getPHYSR() & PHYSR_LNK)
657           tmp = PHY_LINK_ON;
658#elif   _WIZCHIP_ == W5200
659   if(getPHYSTATUS() & PHYSTATUS_LINK)
660      tmp = PHY_LINK_ON;
661#elif _WIZCHIP_ == W5500
662   if(getPHYCFGR() & PHYCFGR_LNK_ON)
663      tmp = PHY_LINK_ON;
664
665#else
666   tmp = -1;
667#endif
668   return tmp;
669}
670
671#if _WIZCHIP_ > W5100
672
673int8_t wizphy_getphypmode(void)
674{
675   int8_t tmp = 0;
676   #if   _WIZCHIP_ == W5200
677      if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
678         tmp = PHY_POWER_DOWN;
679      else
680         tmp = PHY_POWER_NORM;
681   #elif _WIZCHIP_ == 5500
682      if((getPHYCFGR() & PHYCFGR_OPMDC_ALLA) == PHYCFGR_OPMDC_PDOWN)
683         tmp = PHY_POWER_DOWN;
684      else
685         tmp = PHY_POWER_NORM;
686   #else
687      tmp = -1;
688   #endif
689   return tmp;
690}
691#endif
692
693#if _WIZCHIP_ == W5100S
694void wizphy_reset(void)
695{
696        uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
697        tmp |= BMCR_RESET;
698        wiz_mdio_write(PHYMDIO_BMCR, tmp);
699        while(wiz_mdio_read(PHYMDIO_BMCR)&BMCR_RESET){}
700}
701
702void wizphy_setphyconf(wiz_PhyConf* phyconf)
703{
704   uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
705   if(phyconf->mode == PHY_MODE_AUTONEGO)
706      tmp |= BMCR_AUTONEGO;
707   else
708   {
709          tmp &= ~BMCR_AUTONEGO;
710      if(phyconf->duplex == PHY_DUPLEX_FULL)
711      {
712          tmp |= BMCR_DUP;
713      }
714      else
715      {
716          tmp &= ~BMCR_DUP;
717      }
718      if(phyconf->speed == PHY_SPEED_100)
719      {
720          tmp |= BMCR_SPEED;
721      }
722      else
723      {
724          tmp &= ~BMCR_SPEED;
725      }
726   }
727   wiz_mdio_write(PHYMDIO_BMCR, tmp);
728}
729
730void wizphy_getphyconf(wiz_PhyConf* phyconf)
731{
732   uint16_t tmp = 0;
733   tmp = wiz_mdio_read(PHYMDIO_BMCR);
734   phyconf->by   = PHY_CONFBY_SW;
735   if(tmp & BMCR_AUTONEGO)
736   {
737           phyconf->mode = PHY_MODE_AUTONEGO;
738   }
739   else
740   {
741           phyconf->mode = PHY_MODE_MANUAL;
742           if(tmp&BMCR_DUP) phyconf->duplex = PHY_DUPLEX_FULL;
743           else phyconf->duplex = PHY_DUPLEX_HALF;
744           if(tmp&BMCR_SPEED) phyconf->speed = PHY_SPEED_100;
745           else phyconf->speed = PHY_SPEED_10;
746   }
747}
748
749int8_t wizphy_setphypmode(uint8_t pmode)
750{
751   uint16_t tmp = 0;
752   tmp = wiz_mdio_read(PHYMDIO_BMCR);
753   if( pmode == PHY_POWER_DOWN)
754   {
755      tmp |= BMCR_PWDN;
756   }
757   else
758   {
759           tmp &= ~BMCR_PWDN;
760   }
761   wiz_mdio_write(PHYMDIO_BMCR, tmp);
762   tmp = wiz_mdio_read(PHYMDIO_BMCR);
763   if( pmode == PHY_POWER_DOWN)
764   {
765      if(tmp & BMCR_PWDN) return 0;
766   }
767   else
768   {
769      if((tmp & BMCR_PWDN) != BMCR_PWDN) return 0;
770   }
771   return -1;
772}
773
774#endif
775#if _WIZCHIP_ == W5500
776void wizphy_reset(void)
777{
778   uint8_t tmp = getPHYCFGR();
779   tmp &= PHYCFGR_RST;
780   setPHYCFGR(tmp);
781   tmp = getPHYCFGR();
782   tmp |= ~PHYCFGR_RST;
783   setPHYCFGR(tmp);
784}
785
786void wizphy_setphyconf(wiz_PhyConf* phyconf)
787{
788   uint8_t tmp = 0;
789   if(phyconf->by == PHY_CONFBY_SW)
790      tmp |= PHYCFGR_OPMD;
791   else
792      tmp &= ~PHYCFGR_OPMD;
793   if(phyconf->mode == PHY_MODE_AUTONEGO)
794      tmp |= PHYCFGR_OPMDC_ALLA;
795   else
796   {
797      if(phyconf->duplex == PHY_DUPLEX_FULL)
798      {
799         if(phyconf->speed == PHY_SPEED_100)
800            tmp |= PHYCFGR_OPMDC_100F;
801         else
802            tmp |= PHYCFGR_OPMDC_10F;
803      }
804      else
805      {
806         if(phyconf->speed == PHY_SPEED_100)
807            tmp |= PHYCFGR_OPMDC_100H;
808         else
809            tmp |= PHYCFGR_OPMDC_10H;
810      }
811   }
812   setPHYCFGR(tmp);
813   wizphy_reset();
814}
815
816void wizphy_getphyconf(wiz_PhyConf* phyconf)
817{
818   uint8_t tmp = 0;
819   tmp = getPHYCFGR();
820   phyconf->by   = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
821   switch(tmp & PHYCFGR_OPMDC_ALLA)
822   {
823      case PHYCFGR_OPMDC_ALLA:
824      case PHYCFGR_OPMDC_100FA:
825         phyconf->mode = PHY_MODE_AUTONEGO;
826         break;
827      default:
828         phyconf->mode = PHY_MODE_MANUAL;
829         break;
830   }
831   switch(tmp & PHYCFGR_OPMDC_ALLA)
832   {
833      case PHYCFGR_OPMDC_100FA:
834      case PHYCFGR_OPMDC_100F:
835      case PHYCFGR_OPMDC_100H:
836         phyconf->speed = PHY_SPEED_100;
837         break;
838      default:
839         phyconf->speed = PHY_SPEED_10;
840         break;
841   }
842   switch(tmp & PHYCFGR_OPMDC_ALLA)
843   {
844      case PHYCFGR_OPMDC_100FA:
845      case PHYCFGR_OPMDC_100F:
846      case PHYCFGR_OPMDC_10F:
847         phyconf->duplex = PHY_DUPLEX_FULL;
848         break;
849      default:
850         phyconf->duplex = PHY_DUPLEX_HALF;
851         break;
852   }
853}
854
855void wizphy_getphystat(wiz_PhyConf* phyconf)
856{
857   uint8_t tmp = getPHYCFGR();
858   phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
859   phyconf->speed  = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
860}
861
862int8_t wizphy_setphypmode(uint8_t pmode)
863{
864   uint8_t tmp = 0;
865   tmp = getPHYCFGR();
866   if((tmp & PHYCFGR_OPMD)== 0) return -1;
867   tmp &= ~PHYCFGR_OPMDC_ALLA;
868   if( pmode == PHY_POWER_DOWN)
869      tmp |= PHYCFGR_OPMDC_PDOWN;
870   else
871      tmp |= PHYCFGR_OPMDC_ALLA;
872   setPHYCFGR(tmp);
873   wizphy_reset();
874   tmp = getPHYCFGR();
875   if( pmode == PHY_POWER_DOWN)
876   {
877      if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
878   }
879   else
880   {
881      if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
882   }
883   return -1;
884}
885#endif
886
887
888void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
889{
890   setSHAR(pnetinfo->mac);
891   setGAR(pnetinfo->gw);
892   setSUBR(pnetinfo->sn);
893   setSIPR(pnetinfo->ip);
894   _DNS_[0] = pnetinfo->dns[0];
895   _DNS_[1] = pnetinfo->dns[1];
896   _DNS_[2] = pnetinfo->dns[2];
897   _DNS_[3] = pnetinfo->dns[3];
898   _DHCP_   = pnetinfo->dhcp;
899}
900
901void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
902{
903   getSHAR(pnetinfo->mac);
904   getGAR(pnetinfo->gw);
905   getSUBR(pnetinfo->sn);
906   getSIPR(pnetinfo->ip);
907   pnetinfo->dns[0]= _DNS_[0];
908   pnetinfo->dns[1]= _DNS_[1];
909   pnetinfo->dns[2]= _DNS_[2];
910   pnetinfo->dns[3]= _DNS_[3];
911   pnetinfo->dhcp  = _DHCP_;
912}
913
914int8_t wizchip_setnetmode(netmode_type netmode)
915{
916   uint8_t tmp = 0;
917#if _WIZCHIP_ != W5500
918   if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
919#else
920   if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
921#endif
922   tmp = getMR();
923   tmp |= (uint8_t)netmode;
924   setMR(tmp);
925   return 0;
926}
927
928netmode_type wizchip_getnetmode(void)
929{
930   return (netmode_type) getMR();
931}
932
933void wizchip_settimeout(wiz_NetTimeout* nettime)
934{
935   setRCR(nettime->retry_cnt);
936   setRTR(nettime->time_100us);
937}
938
939void wizchip_gettimeout(wiz_NetTimeout* nettime)
940{
941   nettime->retry_cnt = getRCR();
942   nettime->time_100us = getRTR();
943}
Note: See TracBrowser for help on using the repository browser.