Changeset 108 for ctrl/firmware/Main/CubeMX/Core
- Timestamp:
- Mar 6, 2025, 10:09:08 AM (2 months ago)
- Location:
- ctrl/firmware/Main/CubeMX/Core
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
ctrl/firmware/Main/CubeMX/Core/Inc/adc.h
r96 r108 35 35 /* USER CODE END Includes */ 36 36 37 extern ADC_HandleTypeDef hadc2; 38 37 39 extern ADC_HandleTypeDef hadc3; 38 40 39 41 /* USER CODE BEGIN Private defines */ 40 42 43 #define ADC2_CHANNELS (2U) 41 44 #define ADC3_CHANNELS (4U) 42 45 #define VREF (3000U) 46 47 typedef union ADC2_data_t 48 { 49 uint16_t Raw[ADC2_CHANNELS]; 50 struct 51 { 52 int16_t charge_strom; 53 int16_t eload_strom; 54 } Name; 55 } __attribute__((packed, aligned(32))) ADC2_data_t; 43 56 44 57 typedef union ADC3_data_t … … 54 67 } __attribute__((packed, aligned(32))) ADC3_data_t; 55 68 69 56 70 /* USER CODE END Private defines */ 57 71 72 void MX_ADC2_Init(void); 58 73 void MX_ADC3_Init(void); 59 74 60 75 /* USER CODE BEGIN Prototypes */ 61 76 77 extern volatile ADC2_data_t ADC2Data; 62 78 extern volatile ADC3_data_t ADC3Data; 63 79 -
ctrl/firmware/Main/CubeMX/Core/Inc/main.h
r107 r108 74 74 #define DAC_U_LIMIT_Pin GPIO_PIN_5 75 75 #define DAC_U_LIMIT_GPIO_Port GPIOA 76 #define BAT_I_SENSE_PLUS_Pin GPIO_PIN_6 77 #define BAT_I_SENSE_PLUS_GPIO_Port GPIOA 78 #define BAT_I_SENSE_MINUS_Pin GPIO_PIN_7 79 #define BAT_I_SENSE_MINUS_GPIO_Port GPIOA 76 80 #define POWER_4V_EN_Pin GPIO_PIN_15 77 81 #define POWER_4V_EN_GPIO_Port GPIOF -
ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h
r94 r108 58 58 void DMA1_Stream3_IRQHandler(void); 59 59 void DMA1_Stream4_IRQHandler(void); 60 void DMA1_Stream5_IRQHandler(void); 60 61 void EXTI9_5_IRQHandler(void); 61 62 void TIM3_IRQHandler(void); -
ctrl/firmware/Main/CubeMX/Core/Src/adc.c
r96 r108 23 23 /* USER CODE BEGIN 0 */ 24 24 25 volatile ADC2_data_t ADC2Data __attribute__((section(".AXI_RAM_4_DMA"))); 25 26 volatile ADC3_data_t ADC3Data __attribute__((section(".BKP_RAM_4_DMA"))); 26 27 27 28 /* USER CODE END 0 */ 28 29 30 ADC_HandleTypeDef hadc2; 29 31 ADC_HandleTypeDef hadc3; 32 DMA_HandleTypeDef hdma_adc2; 30 33 DMA_HandleTypeDef hdma_adc3; 31 34 35 /* ADC2 init function */ 36 void MX_ADC2_Init(void) 37 { 38 39 /* USER CODE BEGIN ADC2_Init 0 */ 40 41 // This ADC is used to sample current that flows on shunts during cell charge and during cell discharge via electronic load 42 43 /* USER CODE END ADC2_Init 0 */ 44 45 ADC_ChannelConfTypeDef sConfig = {0}; 46 47 /* USER CODE BEGIN ADC2_Init 1 */ 48 49 /* USER CODE END ADC2_Init 1 */ 50 51 /** Common config 52 */ 53 hadc2.Instance = ADC2; 54 hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256; 55 hadc2.Init.Resolution = ADC_RESOLUTION_16B; 56 hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE; 57 hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV; 58 hadc2.Init.LowPowerAutoWait = DISABLE; 59 hadc2.Init.ContinuousConvMode = ENABLE; 60 hadc2.Init.NbrOfConversion = 2; 61 hadc2.Init.DiscontinuousConvMode = DISABLE; 62 hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 63 hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 64 hadc2.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR; 65 hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 66 hadc2.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; 67 hadc2.Init.OversamplingMode = ENABLE; 68 hadc2.Init.Oversampling.Ratio = 1024; 69 hadc2.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_10; 70 hadc2.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER; 71 hadc2.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE; 72 if (HAL_ADC_Init(&hadc2) != HAL_OK) 73 { 74 Error_Handler(); 75 } 76 77 /** Configure Regular Channel 78 */ 79 sConfig.Channel = ADC_CHANNEL_3; 80 sConfig.Rank = ADC_REGULAR_RANK_1; 81 sConfig.SamplingTime = ADC_SAMPLETIME_810CYCLES_5; 82 sConfig.SingleDiff = ADC_DIFFERENTIAL_ENDED; 83 sConfig.OffsetNumber = ADC_OFFSET_NONE; 84 sConfig.Offset = 0; 85 sConfig.OffsetSignedSaturation = DISABLE; 86 if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 87 { 88 Error_Handler(); 89 } 90 91 /** Configure Regular Channel 92 */ 93 sConfig.Channel = ADC_CHANNEL_4; 94 sConfig.Rank = ADC_REGULAR_RANK_2; 95 if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 96 { 97 Error_Handler(); 98 } 99 /* USER CODE BEGIN ADC2_Init 2 */ 100 101 HAL_Delay(100U); 102 if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc2, ADC_CALIB_OFFSET, ADC_DIFFERENTIAL_ENDED)) Error_Handler(); 103 if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc2, ADC_CALIB_OFFSET_LINEARITY, ADC_DIFFERENTIAL_ENDED)) Error_Handler(); 104 HAL_Delay(100U); 105 106 //if (HAL_OK != HAL_ADC_Start(&hadc3)) Error_Handler(); 107 if (HAL_OK != HAL_ADC_Start_DMA(&hadc2, (uint32_t*)&ADC2Data, ADC2_CHANNELS)) Error_Handler(); 108 __HAL_DMA_DISABLE_IT(&hdma_adc2, DMA_IT_HT); 109 110 uint16_t offset = 0; 111 for (int i = 0; i < 100; i++) 112 { 113 114 } 115 116 117 /* USER CODE END ADC2_Init 2 */ 118 119 } 32 120 /* ADC3 init function */ 33 121 void MX_ADC3_Init(void) … … 122 210 //if (HAL_OK != HAL_ADC_Start(&hadc3)) Error_Handler(); 123 211 if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&ADC3Data, ADC3_CHANNELS)) Error_Handler(); 124 //__HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT);212 __HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT); 125 213 126 214 … … 133 221 134 222 GPIO_InitTypeDef GPIO_InitStruct = {0}; 135 if(adcHandle->Instance==ADC3) 223 if(adcHandle->Instance==ADC2) 224 { 225 /* USER CODE BEGIN ADC2_MspInit 0 */ 226 227 /* USER CODE END ADC2_MspInit 0 */ 228 /* ADC2 clock enable */ 229 __HAL_RCC_ADC12_CLK_ENABLE(); 230 231 __HAL_RCC_GPIOA_CLK_ENABLE(); 232 __HAL_RCC_GPIOC_CLK_ENABLE(); 233 /**ADC2 GPIO Configuration 234 PA6 ------> ADC2_INP3 235 PA7 ------> ADC2_INN3 236 PC4 ------> ADC2_INP4 237 PC5 ------> ADC2_INN4 238 */ 239 GPIO_InitStruct.Pin = BAT_I_SENSE_PLUS_Pin|BAT_I_SENSE_MINUS_Pin; 240 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 241 GPIO_InitStruct.Pull = GPIO_NOPULL; 242 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 243 244 GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 245 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 246 GPIO_InitStruct.Pull = GPIO_NOPULL; 247 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 248 249 /* ADC2 DMA Init */ 250 /* ADC2 Init */ 251 hdma_adc2.Instance = DMA1_Stream5; 252 hdma_adc2.Init.Request = DMA_REQUEST_ADC2; 253 hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 254 hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 255 hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 256 hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 257 hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 258 hdma_adc2.Init.Mode = DMA_CIRCULAR; 259 hdma_adc2.Init.Priority = DMA_PRIORITY_VERY_HIGH; 260 hdma_adc2.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 261 if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 262 { 263 Error_Handler(); 264 } 265 266 __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc2); 267 268 /* USER CODE BEGIN ADC2_MspInit 1 */ 269 270 /* USER CODE END ADC2_MspInit 1 */ 271 } 272 else if(adcHandle->Instance==ADC3) 136 273 { 137 274 /* USER CODE BEGIN ADC3_MspInit 0 */ … … 177 314 { 178 315 179 if(adcHandle->Instance==ADC3) 316 if(adcHandle->Instance==ADC2) 317 { 318 /* USER CODE BEGIN ADC2_MspDeInit 0 */ 319 320 /* USER CODE END ADC2_MspDeInit 0 */ 321 /* Peripheral clock disable */ 322 __HAL_RCC_ADC12_CLK_DISABLE(); 323 324 /**ADC2 GPIO Configuration 325 PA6 ------> ADC2_INP3 326 PA7 ------> ADC2_INN3 327 PC4 ------> ADC2_INP4 328 PC5 ------> ADC2_INN4 329 */ 330 HAL_GPIO_DeInit(GPIOA, BAT_I_SENSE_PLUS_Pin|BAT_I_SENSE_MINUS_Pin); 331 332 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5); 333 334 /* ADC2 DMA DeInit */ 335 HAL_DMA_DeInit(adcHandle->DMA_Handle); 336 /* USER CODE BEGIN ADC2_MspDeInit 1 */ 337 338 /* USER CODE END ADC2_MspDeInit 1 */ 339 } 340 else if(adcHandle->Instance==ADC3) 180 341 { 181 342 /* USER CODE BEGIN ADC3_MspDeInit 0 */ -
ctrl/firmware/Main/CubeMX/Core/Src/dma.c
r92 r108 59 59 HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0); 60 60 HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); 61 /* DMA1_Stream5_IRQn interrupt configuration */ 62 HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0); 63 HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); 61 64 62 65 } -
ctrl/firmware/Main/CubeMX/Core/Src/gpio.c
r107 r108 97 97 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 98 98 99 /*Configure GPIO pins : PC13 PC1 PC2 PC3 100 PC4 PC5 */ 101 GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 102 |GPIO_PIN_4|GPIO_PIN_5; 99 /*Configure GPIO pins : PC13 PC1 PC2 PC3 */ 100 GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; 103 101 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 104 102 GPIO_InitStruct.Pull = GPIO_NOPULL; … … 118 116 119 117 /*Configure GPIO pins : PA0 PA1 PA2 PA3 120 PA6 PA7 PA9 PA10 121 PA11 PA12 */ 118 PA9 PA10 PA11 PA12 */ 122 119 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 123 |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_9|GPIO_PIN_10 124 |GPIO_PIN_11|GPIO_PIN_12; 120 |GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12; 125 121 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 126 122 GPIO_InitStruct.Pull = GPIO_NOPULL; -
ctrl/firmware/Main/CubeMX/Core/Src/main.c
r98 r108 150 150 MX_DAC1_Init(); 151 151 MX_TIM1_Init(); 152 MX_ADC2_Init(); 152 153 /* USER CODE BEGIN 2 */ 153 154 … … 253 254 /** Initializes the peripherals clock 254 255 */ 255 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USART10 256 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_SDMMC 257 |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_USART10 256 258 |RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_USART3; 259 PeriphClkInitStruct.PLL2.PLL2M = 2; 260 PeriphClkInitStruct.PLL2.PLL2N = 20; 261 PeriphClkInitStruct.PLL2.PLL2P = 2; 262 PeriphClkInitStruct.PLL2.PLL2Q = 11; 263 PeriphClkInitStruct.PLL2.PLL2R = 5; 264 PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3; 265 PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE; 266 PeriphClkInitStruct.PLL2.PLL2FRACN = 0; 257 267 PeriphClkInitStruct.PLL3.PLL3M = 25; 258 268 PeriphClkInitStruct.PLL3.PLL3N = 180; … … 263 273 PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM; 264 274 PeriphClkInitStruct.PLL3.PLL3FRACN = 0; 275 PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2; 276 PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2; 265 277 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL3; 266 278 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_PLL3; -
ctrl/firmware/Main/CubeMX/Core/Src/sdmmc.c
r83 r108 57 57 58 58 GPIO_InitTypeDef GPIO_InitStruct = {0}; 59 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};60 59 if(sdHandle->Instance==SDMMC1) 61 60 { … … 63 62 64 63 /* USER CODE END SDMMC1_MspInit 0 */ 65 66 /** Initializes the peripherals clock67 */68 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC;69 PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;70 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)71 {72 Error_Handler();73 }74 75 64 /* SDMMC1 clock enable */ 76 65 __HAL_RCC_SDMMC1_CLK_ENABLE(); -
ctrl/firmware/Main/CubeMX/Core/Src/spi.c
r106 r108 129 129 /* USER CODE END SPI2_MspInit 0 */ 130 130 131 /** Initializes the peripherals clock132 */133 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI2;134 PeriphClkInitStruct.PLL2.PLL2M = 2;135 PeriphClkInitStruct.PLL2.PLL2N = 20;136 PeriphClkInitStruct.PLL2.PLL2P = 2;137 PeriphClkInitStruct.PLL2.PLL2Q = 11;138 PeriphClkInitStruct.PLL2.PLL2R = 10;139 PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;140 PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;141 PeriphClkInitStruct.PLL2.PLL2FRACN = 0;142 PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;143 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)144 {145 Error_Handler();146 }147 148 131 /* SPI2 clock enable */ 149 132 __HAL_RCC_SPI2_CLK_ENABLE(); -
ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c
r94 r108 61 61 62 62 /* External variables --------------------------------------------------------*/ 63 extern DMA_HandleTypeDef hdma_adc2; 63 64 extern DMA_HandleTypeDef hdma_adc3; 64 65 extern SD_HandleTypeDef hsd1; … … 250 251 251 252 /** 253 * @brief This function handles DMA1 stream5 global interrupt. 254 */ 255 void DMA1_Stream5_IRQHandler(void) 256 { 257 /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ 258 259 /* USER CODE END DMA1_Stream5_IRQn 0 */ 260 HAL_DMA_IRQHandler(&hdma_adc2); 261 /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ 262 263 /* USER CODE END DMA1_Stream5_IRQn 1 */ 264 } 265 266 /** 252 267 * @brief This function handles EXTI line[9:5] interrupts. 253 268 */
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