Changeset 77 for ctrl/firmware/Main/CubeMX/Core

Timestamp:

Feb 3, 2025, 3:27:37 PM (3 months ago)

Author:

Zed

Message:

LwIP was removed from the project.

Location:

ctrl/firmware/Main/CubeMX/Core

Files:

• Inc/main.h (modified) (1 diff)
• Inc/stm32h7xx_it.h (modified) (1 diff)
• Src/gpio.c (modified) (2 diffs)
• Src/main.c (modified) (2 diffs)
• Src/spi.c (modified) (6 diffs)
• Src/stm32h7xx_it.c (modified) (5 diffs)

ctrl/firmware/Main/CubeMX/Core/Inc/main.h

@@ -114 +114 @@
 #define ETH_SPI_INT_Pin GPIO_PIN_8
 #define ETH_SPI_INT_GPIO_Port GPIOB
+#define ETH_SPI_INT_EXTI_IRQn EXTI9_5_IRQn
 #define ETH_SPI_RST_Pin GPIO_PIN_9
 #define ETH_SPI_RST_GPIO_Port GPIOB

ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h

@@ -56 +56 @@
 void DMA1_Stream1_IRQHandler(void);
 void DMA1_Stream2_IRQHandler(void);
+void EXTI9_5_IRQHandler(void);
 void TIM3_IRQHandler(void);
+void SPI2_IRQHandler(void);
 void USART3_IRQHandler(void);
 void TIM8_CC_IRQHandler(void);

ctrl/firmware/Main/CubeMX/Core/Src/gpio.c

@@ -74 +74 @@
 
   /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ETH_SPI_NSS_GPIO_Port, ETH_SPI_NSS_Pin, GPIO_PIN_SET);
+
+  /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(ETH_SPI_RST_GPIO_Port, ETH_SPI_RST_Pin, GPIO_PIN_RESET);
 
@@ -186 +189 @@
   HAL_GPIO_Init(SD_DETECT_GPIO_Port, &GPIO_InitStruct);
 
+  /*Configure GPIO pins : ETH_SPI_NSS_Pin ETH_SPI_RST_Pin */
+  GPIO_InitStruct.Pin = ETH_SPI_NSS_Pin|ETH_SPI_RST_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
   /*Configure GPIO pin : ETH_SPI_INT_Pin */
   GPIO_InitStruct.Pin = ETH_SPI_INT_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(ETH_SPI_INT_GPIO_Port, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : ETH_SPI_RST_Pin */
-  GPIO_InitStruct.Pin = ETH_SPI_RST_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(ETH_SPI_RST_GPIO_Port, &GPIO_InitStruct);
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
 
 }

ctrl/firmware/Main/CubeMX/Core/Src/main.c

@@ -35 +35 @@
 #include <stdio.h>
 
-#include "lwip.h"
-
 /* USER CODE END Includes */
 
@@ -187 +185 @@
   RCC_OscInitStruct.PLL.PLLN = 40;
   RCC_OscInitStruct.PLL.PLLP = 2;
-  RCC_OscInitStruct.PLL.PLLQ = 4;
+  RCC_OscInitStruct.PLL.PLLQ = 2;
   RCC_OscInitStruct.PLL.PLLR = 2;
   RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;

ctrl/firmware/Main/CubeMX/Core/Src/spi.c

@@ -46 +46 @@
   hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
   hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
-  hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
+  hspi2.Init.NSS = SPI_NSS_SOFT;
   hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
   hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
@@ -57 +57 @@
   hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
   hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
-  hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_03CYCLE;
-  hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_06CYCLE;
+  hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
+  hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_01CYCLE;
   hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
-  hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
+  hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
   hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   if (HAL_SPI_Init(&hspi2) != HAL_OK)
@@ -128 +128 @@
   */
     PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI2;
-    PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
+    PeriphClkInitStruct.PLL2.PLL2M = 2;
+    PeriphClkInitStruct.PLL2.PLL2N = 20;
+    PeriphClkInitStruct.PLL2.PLL2P = 2;
+    PeriphClkInitStruct.PLL2.PLL2Q = 11;
+    PeriphClkInitStruct.PLL2.PLL2R = 10;
+    PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
+    PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
+    PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
+    PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
     {
@@ -142 +150 @@
     PB14     ------> SPI2_MISO
     PB15     ------> SPI2_MOSI
-    PB4(NJTRST)     ------> SPI2_NSS
     */
     GPIO_InitStruct.Pin = ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin;
@@ -151 +158 @@
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
-    GPIO_InitStruct.Pin = ETH_SPI_NSS_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF7_SPI2;
-    HAL_GPIO_Init(ETH_SPI_NSS_GPIO_Port, &GPIO_InitStruct);
-
+    /* SPI2 interrupt Init */
+    HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(SPI2_IRQn);
   /* USER CODE BEGIN SPI2_MspInit 1 */
 
@@ -236 +239 @@
     PB14     ------> SPI2_MISO
     PB15     ------> SPI2_MOSI
-    PB4(NJTRST)     ------> SPI2_NSS
-    */
-    HAL_GPIO_DeInit(GPIOB, ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin|ETH_SPI_NSS_Pin);
-
+    */
+    HAL_GPIO_DeInit(GPIOB, ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin);
+
+    /* SPI2 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(SPI2_IRQn);
   /* USER CODE BEGIN SPI2_MspDeInit 1 */
 

ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c

@@ -24 +24 @@
 /* USER CODE BEGIN Includes */
 
+#include "FreeRTOS.h"
+#include "semphr.h"
+
 /* USER CODE END Includes */
 
@@ -59 +62 @@
 extern SD_HandleTypeDef hsd1;
 extern DMA_HandleTypeDef hdma_spi4_tx;
+extern SPI_HandleTypeDef hspi2;
 extern SPI_HandleTypeDef hspi4;
 extern TIM_HandleTypeDef htim3;
@@ -212 +216 @@
 
 /**
+  * @brief This function handles EXTI line[9:5] interrupts.
+  */
+void EXTI9_5_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI9_5_IRQn 0 */
+
+  /* USER CODE END EXTI9_5_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(ETH_SPI_INT_Pin);
+  /* USER CODE BEGIN EXTI9_5_IRQn 1 */
+
+  /* USER CODE END EXTI9_5_IRQn 1 */
+}
+
+/**
   * @brief This function handles TIM3 global interrupt.
   */
@@ -226 +244 @@
 
 /**
+  * @brief This function handles SPI2 global interrupt.
+  */
+void SPI2_IRQHandler(void)
+{
+  /* USER CODE BEGIN SPI2_IRQn 0 */
+
+  /* USER CODE END SPI2_IRQn 0 */
+  HAL_SPI_IRQHandler(&hspi2);
+  /* USER CODE BEGIN SPI2_IRQn 1 */
+
+  /* USER CODE END SPI2_IRQn 1 */
+}
+
+/**
   * @brief This function handles USART3 global interrupt.
   */
@@ -313 +345 @@
 //------------------------------------------------------------------------------
 
+void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef* hspi)
+{
+        if (hspi->Instance == SPI2)
+        {
+                //HAL_GPIO_WritePin(ETH_SPI_NSS_GPIO_Port, ETH_SPI_NSS_Pin, GPIO_PIN_SET);
+        }
+}
+
+//------------------------------------------------------------------------------
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+        if (GPIO_Pin == ETH_SPI_INT_Pin)
+        {
+                /*extern SemaphoreHandle_t s_xSemaphoreSpi;
+
+                portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
+
+                xSemaphoreGiveFromISR(s_xSemaphoreSpi, &xHigherPriorityTaskWoken);*/
+
+        }
+}
+
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+
+
 /* USER CODE END 1 */