Ignore:
Timestamp:
Feb 14, 2025, 11:42:01 AM (3 months ago)
Author:
Zed
Message:

Fixing project.

Location:
ctrl/firmware/Main/CubeMX
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h

    r92 r94  
    6767void TIM7_IRQHandler(void);
    6868void SPI4_IRQHandler(void);
    69 void MDMA_IRQHandler(void);
    7069void BDMA_Channel0_IRQHandler(void);
    7170void USART10_IRQHandler(void);
  • ctrl/firmware/Main/CubeMX/Core/Src/adc.c

    r92 r94  
    2323/* USER CODE BEGIN 0 */
    2424
    25 ADC3_data_t ADC3_values         __attribute__((section(".BKP_RAM_4_DMA")));
     25uint16_t ADC3_values[1] __attribute__((section(".BKP_RAM_4_DMA")));
    2626
    2727/* USER CODE END 0 */
     
    5050  hadc3.Init.Resolution = ADC_RESOLUTION_12B;
    5151  hadc3.Init.DataAlign = ADC3_DATAALIGN_RIGHT;
    52   hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;
    53   hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV;
     52  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
     53  hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
    5454  hadc3.Init.LowPowerAutoWait = DISABLE;
    5555  hadc3.Init.ContinuousConvMode = ENABLE;
    56   hadc3.Init.NbrOfConversion = 4;
     56  hadc3.Init.NbrOfConversion = 1;
    5757  hadc3.Init.DiscontinuousConvMode = DISABLE;
    5858  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
     
    6060  hadc3.Init.DMAContinuousRequests = ENABLE;
    6161  hadc3.Init.SamplingMode = ADC_SAMPLING_MODE_NORMAL;
    62   hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
     62  hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
    6363  hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
    6464  hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
    6565  hadc3.Init.OversamplingMode = ENABLE;
    6666  hadc3.Init.Oversampling.Ratio = ADC3_OVERSAMPLING_RATIO_256;
    67   hadc3.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11;
     67  hadc3.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_8;
    6868  hadc3.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
    6969  hadc3.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
     
    7575  /** Configure Regular Channel
    7676  */
    77   sConfig.Channel = ADC_CHANNEL_VBAT;
     77  sConfig.Channel = ADC_CHANNEL_10;
    7878  sConfig.Rank = ADC_REGULAR_RANK_1;
    7979  sConfig.SamplingTime = ADC3_SAMPLETIME_640CYCLES_5;
     
    8686    Error_Handler();
    8787  }
    88 
    89   /** Configure Regular Channel
    90   */
    91   sConfig.Channel = ADC_CHANNEL_VREFINT;
    92   sConfig.Rank = ADC_REGULAR_RANK_2;
    93   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
    94   {
    95     Error_Handler();
    96   }
    97 
    98   /** Configure Regular Channel
    99   */
    100   sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
    101   sConfig.Rank = ADC_REGULAR_RANK_3;
    102   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
    103   {
    104     Error_Handler();
    105   }
    106 
    107   /** Configure Regular Channel
    108   */
    109   sConfig.Channel = ADC_CHANNEL_10;
    110   sConfig.Rank = ADC_REGULAR_RANK_4;
    111   sConfig.SamplingTime = ADC3_SAMPLETIME_2CYCLES_5;
    112   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
    113   {
    114     Error_Handler();
    115   }
    11688  /* USER CODE BEGIN ADC3_Init 2 */
    11789
     90  HAL_Delay(100U);
    11891  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED)) Error_Handler();
    11992  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED)) Error_Handler();
     93  HAL_Delay(100U);
    12094
    121   if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&ADC3_values, 2)) Error_Handler();
    122   __HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT);
     95  //if (HAL_OK != HAL_ADC_Start(&hadc3)) Error_Handler();
     96  if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)ADC3_values, 1/*ADC3_CHANNELS*/)) Error_Handler();
     97  //__HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT);
    12398
    12499
  • ctrl/firmware/Main/CubeMX/Core/Src/main.c

    r93 r94  
    2525#include "fatfs.h"
    2626#include "i2c.h"
    27 #include "mdma.h"
    2827#include "memorymap.h"
    2928#include "rtc.h"
     
    131130  MX_GPIO_Init();
    132131  MX_DMA_Init();
    133   //MX_MDMA_Init();
    134132  MX_BDMA_Init();
    135133  MX_RTC_Init();
    136134  MX_SPI4_Init();
    137135  MX_SDMMC1_SD_Init();
    138   MX_USART3_UART_Init();
    139136  MX_FATFS_Init();
    140137  MX_TIM8_Init();
     
    145142  MX_I2C2_Init();
    146143  MX_ADC3_Init();
     144  MX_TIM3_Init();
    147145  MX_I2C1_Init();
    148   MX_TIM3_Init();
     146  MX_USART3_UART_Init();
    149147  /* USER CODE BEGIN 2 */
    150148
  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_hal_msp.c

    r72 r94  
    7474  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
    7575
     76  /** Enable the VREF clock
     77  */
     78  __HAL_RCC_VREF_CLK_ENABLE();
     79
     80  /** Disable the Internal Voltage Reference buffer
     81  */
     82  HAL_SYSCFG_DisableVREFBUF();
     83
     84  /** Configure the internal voltage reference buffer high impedance mode
     85  */
     86  HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE);
     87
    7688  /* USER CODE BEGIN MspInit 1 */
    7789
  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c

    r92 r94  
    6262/* External variables --------------------------------------------------------*/
    6363extern DMA_HandleTypeDef hdma_adc3;
    64 extern MDMA_HandleTypeDef hmdma_mdma_channel0_sdmmc1_end_data_0;
    6564extern SD_HandleTypeDef hsd1;
    6665extern DMA_HandleTypeDef hdma_spi2_rx;
     
    381380
    382381/**
    383   * @brief This function handles MDMA global interrupt.
    384   */
    385 void MDMA_IRQHandler(void)
    386 {
    387   /* USER CODE BEGIN MDMA_IRQn 0 */
    388 
    389   /* USER CODE END MDMA_IRQn 0 */
    390   HAL_MDMA_IRQHandler(&hmdma_mdma_channel0_sdmmc1_end_data_0);
    391   /* USER CODE BEGIN MDMA_IRQn 1 */
    392 
    393   /* USER CODE END MDMA_IRQn 1 */
    394 }
    395 
    396 /**
    397382  * @brief This function handles BDMA channel0 global interrupt.
    398383  */
  • ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c

    r93 r94  
    1919#include "fatfs.h"
    2020
    21 uint8_t retSD;                                                                                                                                  /* Return value for SD */
    22 char SDPath[4];                                                                                                                                 /* SD logical drive path */
    23 FATFS SDFatFS     __attribute__((section(".AXI_RAM_4_DMA")));                                           /* File system object for SD logical drive */
    24 FIL SDFile                __attribute__((section(".AXI_RAM_4_DMA")));                                           /* File object for SD */
     21uint8_t retSD;    /* Return value for SD */
     22char SDPath[4];   /* SD logical drive path */
     23FATFS SDFatFS  __PLACE_IN_NONCACHABLE_RAM_FOR_DMA_TRANSFERS__;    /* File system object for SD logical drive */
     24FIL SDFile __PLACE_IN_NONCACHABLE_RAM_FOR_DMA_TRANSFERS__;       /* File object for SD */
    2525
    2626/* USER CODE BEGIN Variables */
  • ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.h

    r91 r94  
    3737extern FIL EEPROMFile;          /* File object for USER */
    3838
     39#define __PLACE_IN_NONCACHABLE_RAM_FOR_DMA_TRANSFERS__ __attribute__((section(".AXI_RAM_4_DMA")))
     40
    3941/* USER CODE END Includes */
    4042
  • ctrl/firmware/Main/CubeMX/Middlewares/Third_Party/FatFs/src/ff.h

    r91 r94  
    123123        DWORD   database;               /* Data base sector */
    124124        DWORD   winsect;                /* Current sector appearing in the win[] */
    125         BYTE    win[_MAX_SS] __ALIGNED(32);       /* Disk access window for Directory, FAT (and file data at tiny cfg) */
     125        BYTE    win[_MAX_SS] __ALIGNED(32);     /* Disk access window for Directory, FAT (and file data at tiny cfg) */
    126126} FATFS;
    127127
  • ctrl/firmware/Main/CubeMX/charger.ioc

    r93 r94  
    11#MicroXplorer Configuration settings - do not modify
    2 ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_VBAT
    3 ADC3.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VREFINT
    4 ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR
    5 ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_10
     2ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_10
    63ADC3.ClockPrescalerADC3=ADC_CLOCK_ASYNC_DIV256
    74ADC3.ContinuousConvMode=ENABLE
     5ADC3.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR
    86ADC3.DMAContinuousRequests=ENABLE
    9 ADC3.EOCSelection=ADC_EOC_SEQ_CONV
    10 ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,OversamplingMode,RightBitShift,ClockPrescalerADC3,Ratio,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSign-1\#ChannelRegularConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSign-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSign-3\#ChannelRegularConversion,NbrOfConversion
    11 ADC3.NbrOfConversion=4
     7ADC3.EOCSelection=ADC_EOC_SINGLE_CONV
     8ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,OversamplingMode,ClockPrescalerADC3,Ratio,NbrOfConversion,RightBitShift,ConversionDataManagement
     9ADC3.NbrOfConversion=1
    1210ADC3.NbrOfConversionFlag=1
    1311ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
    14 ADC3.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
    15 ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
    16 ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE
    1712ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
    18 ADC3.OffsetSign-1\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
    19 ADC3.OffsetSign-2\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
    20 ADC3.OffsetSign-3\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
    2113ADC3.Overrun=ADC_OVR_DATA_OVERWRITTEN
    2214ADC3.OversamplingMode=ENABLE
    2315ADC3.Rank-0\#ChannelRegularConversion=1
    24 ADC3.Rank-1\#ChannelRegularConversion=2
    25 ADC3.Rank-2\#ChannelRegularConversion=3
    26 ADC3.Rank-3\#ChannelRegularConversion=4
    2716ADC3.Ratio=ADC3_OVERSAMPLING_RATIO_256
    28 ADC3.RightBitShift=ADC_RIGHTBITSHIFT_11
     17ADC3.RightBitShift=ADC_RIGHTBITSHIFT_8
    2918ADC3.SamplingTime-0\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
    30 ADC3.SamplingTime-1\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
    31 ADC3.SamplingTime-2\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
    32 ADC3.SamplingTime-3\#ChannelRegularConversion=ADC3_SAMPLETIME_2CYCLES_5
    3319Bdma.ADC3.0.Direction=DMA_PERIPH_TO_MEMORY
    3420Bdma.ADC3.0.EventEnable=DISABLE
     
    270256Mcu.IP0=ADC3
    271257Mcu.IP1=BDMA
    272 Mcu.IP10=MEMORYMAP
    273 Mcu.IP11=NVIC
    274 Mcu.IP12=RCC
    275 Mcu.IP13=RTC
    276 Mcu.IP14=SDMMC1
    277 Mcu.IP15=SPI2
    278 Mcu.IP16=SPI4
    279 Mcu.IP17=SYS
    280 Mcu.IP18=TIM3
    281 Mcu.IP19=TIM6
     258Mcu.IP10=NVIC
     259Mcu.IP11=RCC
     260Mcu.IP12=RTC
     261Mcu.IP13=SDMMC1
     262Mcu.IP14=SPI2
     263Mcu.IP15=SPI4
     264Mcu.IP16=SYS
     265Mcu.IP17=TIM3
     266Mcu.IP18=TIM6
     267Mcu.IP19=TIM8
    282268Mcu.IP2=CORTEX_M7
    283 Mcu.IP20=TIM8
    284 Mcu.IP21=USART2
    285 Mcu.IP22=USART3
    286 Mcu.IP23=USART10
     269Mcu.IP20=USART2
     270Mcu.IP21=USART3
     271Mcu.IP22=USART10
     272Mcu.IP23=VREFBUF
    287273Mcu.IP3=DEBUG
    288274Mcu.IP4=DMA
     
    291277Mcu.IP7=I2C1
    292278Mcu.IP8=I2C2
    293 Mcu.IP9=MDMA
     279Mcu.IP9=MEMORYMAP
    294280Mcu.IPNb=24
    295281Mcu.Name=STM32H723ZETx
     
    348334Mcu.Pin55=PB8
    349335Mcu.Pin56=PB9
    350 Mcu.Pin57=VP_ADC3_TempSens_Input
    351 Mcu.Pin58=VP_ADC3_Vref_Input
    352 Mcu.Pin59=VP_ADC3_Vbat_Input
     336Mcu.Pin57=VP_FATFS_VS_SDIO
     337Mcu.Pin58=VP_FREERTOS_VS_CMSIS_V2
     338Mcu.Pin59=VP_RTC_VS_RTC_Activate
    353339Mcu.Pin6=PF1
    354 Mcu.Pin60=VP_FATFS_VS_SDIO
    355 Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V2
    356 Mcu.Pin62=VP_RTC_VS_RTC_Activate
    357 Mcu.Pin63=VP_RTC_VS_RTC_Calendar
    358 Mcu.Pin64=VP_SYS_VS_tim7
    359 Mcu.Pin65=VP_TIM3_VS_ClockSourceINT
    360 Mcu.Pin66=VP_TIM6_VS_ClockSourceINT
    361 Mcu.Pin67=VP_TIM8_VS_ControllerModeReset
    362 Mcu.Pin68=VP_TIM8_VS_ClockSourceINT
    363 Mcu.Pin69=VP_MEMORYMAP_VS_MEMORYMAP
     340Mcu.Pin60=VP_RTC_VS_RTC_Calendar
     341Mcu.Pin61=VP_SYS_VS_tim7
     342Mcu.Pin62=VP_TIM3_VS_ClockSourceINT
     343Mcu.Pin63=VP_TIM6_VS_ClockSourceINT
     344Mcu.Pin64=VP_TIM8_VS_ControllerModeReset
     345Mcu.Pin65=VP_TIM8_VS_ClockSourceINT
     346Mcu.Pin66=VP_VREFBUF_V_VREFBUF
     347Mcu.Pin67=VP_MEMORYMAP_VS_MEMORYMAP
     348Mcu.Pin68=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
    364349Mcu.Pin7=PH0-OSC_IN
    365 Mcu.Pin70=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
    366350Mcu.Pin8=PH1-OSC_OUT
    367351Mcu.Pin9=PC0
    368 Mcu.PinsNb=71
     352Mcu.PinsNb=69
    369353Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0
    370354Mcu.ThirdParty1=STMicroelectronics.X-CUBE-EEPRMA1.5.1.0
     
    372356Mcu.UserConstants=
    373357Mcu.UserName=STM32H723ZETx
    374 Mdma.MDMA_Channel0.Request0=SDMMC1_END_DATA
    375 Mdma.MDMA_Channel0.RequestsNb=1
    376 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.BlockCount=4
    377 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.BlockDataLength=512
    378 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.BufferTransferLength=2048
    379 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.CircularMode=MDMA_LINEAR_LIST
    380 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DataAlignment=MDMA_DATAALIGN_PACKENABLE
    381 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DestBlockAddressOffset=0
    382 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DestBurst=MDMA_DEST_BURST_4BEATS
    383 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DestDataSize=MDMA_DEST_DATASIZE_WORD
    384 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DestinationInc=MDMA_DEST_INC_WORD
    385 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.DstAddress=0
    386 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.Endianness=MDMA_LITTLE_ENDIANNESS_PRESERVE
    387 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.Instance=MDMA_Channel0
    388 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.MaskAddress=0
    389 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.MaskData=0
    390 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.Priority=MDMA_PRIORITY_HIGH
    391 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.Rank=First
    392 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.RequestParameters=Instance,CircularMode,TransferTriggerMode,Priority,Endianness,SourceInc,DestinationInc,SourceDataSize,DestDataSize,DataAlignment,BufferTransferLength,SourceBurst,DestBurst,SourceBlockAddressOffset,DestBlockAddressOffset,MaskAddress,MaskData,SrcAddress,DstAddress,BlockDataLength,BlockCount,Rank
    393 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.SourceBlockAddressOffset=0
    394 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.SourceBurst=MDMA_SOURCE_BURST_4BEATS
    395 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.SourceDataSize=MDMA_SRC_DATASIZE_WORD
    396 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.SourceInc=MDMA_SRC_INC_WORD
    397 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.SrcAddress=0
    398 Mdma.MDMA_Channel0.SDMMC1_END_DATA.0.TransferTriggerMode=MDMA_BUFFER_TRANSFER
    399 Mdma.RequestSet0=MDMA_Channel0
    400 Mdma.RequestSetsNb=1
    401358MxCube.Version=6.13.0
    402359MxDb.Version=DB.6.0.130
     
    412369NVIC.ForceEnableDMAVector=true
    413370NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    414 NVIC.MDMA_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    415371NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    416372NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
     
    686642ProjectManager.UAScriptBeforePath=
    687643ProjectManager.UnderRoot=true
    688 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI4_Init-SPI4-false-HAL-true,7-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C2_Init-I2C2-false-HAL-true,17-MX_ADC3_Init-ADC3-false-HAL-true,18-MX_I2C1_Init-I2C1-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
     644ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_BDMA_Init-BDMA-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI4_Init-SPI4-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-SystemClock_Config-RCC-false-HAL-false,8-MX_FATFS_Init-FATFS-false-HAL-false,9-MX_TIM8_Init-TIM8-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_USART2_UART_Init-USART2-false-HAL-true,12-MX_USART10_UART_Init-USART10-false-HAL-true,13-MX_TIM6_Init-TIM6-false-HAL-true,14-MX_I2C2_Init-I2C2-false-HAL-true,15-MX_ADC3_Init-ADC3-false-HAL-true,16-MX_TIM3_Init-TIM3-false-HAL-true,17-MX_I2C1_Init-I2C1-false-HAL-true,18-MX_USART3_UART_Init-USART3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,0-MX_VREFBUF_Init-VREFBUF-false-HAL-true
    689645RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3
    690646RCC.ADCFreq_Value=60000000
     
    861817USART3.SwapParam=ADVFEATURE_SWAP_ENABLE
    862818USART3.VirtualMode-Asynchronous=VM_ASYNC
    863 VP_ADC3_TempSens_Input.Mode=IN-TempSens
    864 VP_ADC3_TempSens_Input.Signal=ADC3_TempSens_Input
    865 VP_ADC3_Vbat_Input.Mode=IN-Vbat
    866 VP_ADC3_Vbat_Input.Signal=ADC3_Vbat_Input
    867 VP_ADC3_Vref_Input.Mode=IN-Vrefint
    868 VP_ADC3_Vref_Input.Signal=ADC3_Vref_Input
    869819VP_FATFS_VS_SDIO.Mode=SDIO
    870820VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO
     
    889839VP_TIM8_VS_ControllerModeReset.Mode=Reset Mode
    890840VP_TIM8_VS_ControllerModeReset.Signal=TIM8_VS_ControllerModeReset
     841VP_VREFBUF_V_VREFBUF.Mode=ExternalMode
     842VP_VREFBUF_V_VREFBUF.Signal=VREFBUF_V_VREFBUF
    891843board=custom
    892844rtos.0.ip=FREERTOS
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