# 1 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
# 1 "<built-in>" 1
# 1 "<built-in>" 3
# 380 "<built-in>" 3
# 1 "<command line>" 1
# 1 "<built-in>" 2
# 1 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c" 2
# 12 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
# 1 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h" 1
# 14 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h"
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdint.h" 1 3
# 20 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdint.h" 3
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 1 3
# 17 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_ConfDefaults.h" 1 3
# 67 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_ConfDefaults.h" 3
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Conf.h" 1 3
# 35 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Conf.h" 3
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 1 3
# 748 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
static __inline__ __attribute__((__always_inline__)) void __SEGGER_RTL_WR_PARTIAL_WORD_func(char *addr, unsigned w, int n) {
  switch (n) {
  default: addr[3] = (-1) > 0 ? w : w >> 24;
  case 3: addr[2] = (-1) > 0 ? w >> 8 : w >> 16;
  case 2: addr[1] = (-1) > 0 ? w >> 16 : w >> 8;
  case 1: addr[0] = (-1) > 0 ? w >> 24 : w;
  case 0: ;
  }
}

static __inline__ __attribute__((__always_inline__)) void __SEGGER_RTL_WR_WORD_func(char *addr, unsigned w) {
  __SEGGER_RTL_WR_PARTIAL_WORD_func(addr, w, 4);
}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_RD_WORD_func(const void *addr) {
  const unsigned char *pAddr = (const unsigned char *)addr;

  return pAddr[0] * ((-1) > 0 ? 0x1000000u : 0x1u) +
         pAddr[1] * ((-1) > 0 ? 0x10000u : 0x100u) +
         pAddr[2] * ((-1) > 0 ? 0x100u : 0x10000u) +
         pAddr[3] * ((-1) > 0 ? 0x1u : 0x1000000u);
}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_BYTE_PATTERN_func(unsigned x) {
  return x * 0x01010101uL;
}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_FILL_HEAD_func(const void *pOrigin, unsigned Word, unsigned Standin) {
  unsigned Mask;
  unsigned Fill;

  (void)pOrigin;

  Fill = __SEGGER_RTL_BYTE_PATTERN_func(Standin);
# 792 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
  Mask = 0xFFFFFFFFu;
  Mask <<= 8 * (((unsigned)(pOrigin)) & 3u);

  return (Word & Mask) | (Fill & ~Mask);


}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_FILL_TAIL_func(unsigned n, unsigned Word, unsigned Standin) {
  unsigned Mask;
  unsigned Fill;
# 817 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
  if (n >= 4) {
    return Word;
  } else {
    Fill = __SEGGER_RTL_BYTE_PATTERN_func(Standin);
    Mask = 0xFFFFFFFFu << (8 * n);

    return (Fill & Mask) | (Word & ~Mask);
  }


}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_ZBYTE_CHECK_func(unsigned x) {







  return ((x-0x01010101u) & ~x & 0x80808080u);


}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_DIFF_INDEX_func(unsigned x, unsigned y) {
# 866 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
  if ((x & 0x000000FFuL) != (y & 0x000000FFuL)) { return 0; }
  if ((x & 0x0000FF00uL) != (y & 0x0000FF00uL)) { return 1; }
  if ((x & 0x00FF0000uL) != (y & 0x00FF0000uL)) { return 2; }
  if ((x & 0xFF000000uL) != (y & 0xFF000000uL)) { return 3; }
  return 4;


}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_DIFF_BYTE_func(unsigned x, int Index) {



  return (x >> (8*Index)) & 0xFF;

}

static __inline__ __attribute__((__always_inline__)) unsigned __SEGGER_RTL_ZBYTE_INDEX_func(unsigned x) {
# 919 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
  if ((x & 0x000000FFuL) == 0) { return 0; }
  if ((x & 0x0000FF00uL) == 0) { return 1; }
  if ((x & 0x00FF0000uL) == 0) { return 2; }
  if ((x & 0xFF000000uL) == 0) { return 3; }
  return 4;


}

static __inline__ __attribute__((__always_inline__)) _Bool __SEGGER_RTL_atomic_is_lock_free(unsigned size, const volatile void *ptr) {
  switch (size) {
  case 1: return 1;
  case 2: return ((unsigned)ptr & 1) == 0;
  case 4: return ((unsigned)ptr & 3) == 0;
  default: return 0;
  }
}
# 946 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Arm_Conf.h" 3
extern const int __aeabi_SIGABRT;
extern const int __aeabi_SIGINT;
extern const int __aeabi_SIGILL;
extern const int __aeabi_SIGFPE;
extern const int __aeabi_SIGSEGV;
extern const int __aeabi_SIGTERM;

void __aeabi_SIG_DFL(int sig);
void __aeabi_SIG_IGN(int sig);
void __aeabi_SIG_ERR(int sig);
# 36 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_Conf.h" 2 3
# 68 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL_ConfDefaults.h" 2 3
# 18 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 2 3
# 38 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
  typedef struct __SEGGER_RTL_FILE_impl __SEGGER_RTL_FILE;


typedef struct __SEGGER_RTL_locale_data_s __SEGGER_RTL_locale_t;
typedef struct __SEGGER_RTL_locale_codeset_s __SEGGER_RTL_locale_codeset_t;

typedef struct {



  const char * decimal_point;
  const char * thousands_sep;
  const char * grouping;

  const char * int_curr_symbol;
  const char * currency_symbol;
  const char * mon_decimal_point;
  const char * mon_thousands_sep;
  const char * mon_grouping;
  const char * positive_sign;
  const char * negative_sign;

  char int_frac_digits;
  char frac_digits;
  char p_cs_precedes;
  char p_sep_by_space;
  char n_cs_precedes;
  char n_sep_by_space;
  char p_sign_posn;
  char n_sign_posn;
  char int_p_cs_precedes;
  char int_n_cs_precedes;
  char int_p_sep_by_space;
  char int_n_sep_by_space;
  char int_p_sign_posn;
  char int_n_sign_posn;




  const char *day_names;
  const char *abbrev_day_names;
  const char *month_names;
  const char *abbrev_month_names;
  const char *am_pm_indicator;
  const char *date_format;
  const char *time_format;
  const char *date_time_format;
} __SEGGER_RTL_locale_data_t;

struct __SEGGER_RTL_locale_data_s {
  const char * name;
  const __SEGGER_RTL_locale_data_t * data;
  const __SEGGER_RTL_locale_codeset_t * codeset;
};

struct __SEGGER_RTL_POSIX_locale_s {
  const __SEGGER_RTL_locale_t *__category[5];
};

struct timeval;
# 107 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
extern struct __SEGGER_RTL_POSIX_locale_s __SEGGER_RTL_global_locale;
extern struct __SEGGER_RTL_POSIX_locale_s * __SEGGER_RTL_locale_ptr;
extern char * __SEGGER_RTL_locale_name_buffer;
# 118 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
extern const __SEGGER_RTL_locale_t __SEGGER_RTL_c_locale;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_1;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_2;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_3;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_4;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_5;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_6;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_7;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_8;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_9;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_10;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_11;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_13;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_14;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_15;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_iso8859_16;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1250;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1251;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1252;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1253;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1254;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1255;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1256;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1257;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_cp1258;

extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_c_locale_data;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_aa_DJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_aa_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_aa_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_af_NA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_af_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ak_GH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_am_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_AE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_BH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_DZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_EG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_IQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_JO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_KW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_LB_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_LY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_OM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_QA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_SA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_SD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_SY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_TN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ar_YE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_as_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_asa_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_az_Arab_IR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_az_AZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_az_Cyrl_AZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_az_IR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_az_Latn_AZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_be_BY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bem_ZM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bez_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bg_BG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bm_ML_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bn_BD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bn_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bo_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bo_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_br_FR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_brx_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_bs_BA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_byn_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ca_ES_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_cch_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_cgg_UG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_chr_US_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_cs_CZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_cy_GB_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_da_DK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_dav_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_AT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_BE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_CH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_DE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_LI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_de_LU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_dv_MV_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_dz_BT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ebu_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ee_GH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ee_TG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_el_CY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_el_GR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_AS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_AU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_BE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_BW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_BZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_CA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_Dsrt_US_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_GB_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_GU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_HK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_IE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_JM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_MH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_MP_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_MT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_MU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_NA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_NZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_PH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_PK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_SG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_TT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_UM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_US_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_US_POSIX_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_VI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_ZW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_en_ZZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_AR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_BO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_CL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_CO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_CR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_DO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_EC_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_ES_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_GQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_GT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_HN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_MX_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_NI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_PA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_PE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_PR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_PY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_SV_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_US_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_UY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_es_VE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_et_EE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_eu_ES_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fa_AF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fa_IR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ff_SN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fi_FI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fil_PH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fo_FO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_BE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_BF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_BI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_BJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_BL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_CM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_DJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_FR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_GA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_GN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_GP_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_GQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_KM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_LU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_MC_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_MF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_MG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_ML_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_MQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_NE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_RE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_RW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_SN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_TD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fr_TG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_fur_IT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ga_IE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gaa_GH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gez_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gez_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gl_ES_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gsw_CH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gu_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_guz_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_gv_GB_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_Arab_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_Arab_SD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_GH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_Latn_GH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_Latn_NE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_Latn_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_NE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ha_SD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_haw_US_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_he_IL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_hi_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_hr_HR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_hu_HU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_hy_AM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_id_ID_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ig_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ii_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_is_IS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_it_CH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_it_IT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ja_JP_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_jmc_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ka_GE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kab_DZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kaj_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kam_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kcg_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kde_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kea_CV_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kfo_CI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_khq_ML_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ki_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kk_Cyrl_KZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kk_KZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kl_GL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kln_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_km_KH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kn_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ko_KR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kok_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kpe_GN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kpe_LR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ksb_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ksh_DE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_Arab_IQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_Arab_IR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_IQ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_IR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_Latn_SY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_Latn_TR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_SY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ku_TR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_kw_GB_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ky_KG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_lag_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_lg_UG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ln_CD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ln_CG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_lo_LA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_lt_LT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_luo_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_luy_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_lv_LV_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mas_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mas_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mer_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mfe_MU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mg_MG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mi_NZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mk_MK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ml_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mn_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mn_Cyrl_MN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mn_MN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mn_Mong_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mr_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ms_BN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ms_MY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_mt_MT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_my_MM_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_naq_NA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nb_NO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nd_ZW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nds_DE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ne_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ne_NP_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nl_BE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nl_NL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nn_NO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nr_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nso_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ny_MW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_nyn_UG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_oc_FR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_om_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_om_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_or_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pa_Arab_PK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pa_Guru_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pa_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pa_PK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pl_PL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ps_AF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pt_AO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pt_BR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pt_GW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pt_MZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_pt_PT_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_rm_CH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ro_MD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ro_RO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_rof_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ru_MD_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ru_RU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ru_UA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_rw_RW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_rwk_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sa_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_saq_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_se_FI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_se_NO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_seh_MZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ses_ML_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sg_CF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sh_BA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sh_CS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sh_YU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_shi_Latn_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_shi_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_shi_Tfng_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_si_LK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sid_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sk_SK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sl_SI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sn_ZW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_so_DJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_so_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_so_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_so_SO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sq_AL_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_BA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_CS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Cyrl_BA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Cyrl_CS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Cyrl_ME_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Cyrl_RS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Cyrl_YU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Latn_BA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Latn_CS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Latn_ME_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Latn_RS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_Latn_YU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_ME_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_RS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sr_YU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ss_SZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ss_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ssy_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_st_LS_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_st_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sv_FI_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sv_SE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sw_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_sw_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_syr_SY_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ta_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ta_LK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_te_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_teo_KE_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_teo_UG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tg_Cyrl_TJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tg_TJ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_th_TH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ti_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ti_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tig_ER_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tl_PH_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tn_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_to_TO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tr_TR_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_trv_TW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ts_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tt_RU_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tzm_Latn_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_tzm_MA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ug_Arab_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ug_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uk_UA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ur_IN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ur_PK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uz_AF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uz_Arab_AF_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uz_Cyrl_UZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uz_Latn_UZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_uz_UZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_ve_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_vi_VN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_vun_TZ_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_wal_ET_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_wo_Latn_SN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_wo_SN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_xh_ZA_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_xog_UG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_yo_NG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hans_CN_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hans_HK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hans_MO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hans_SG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hant_HK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hant_MO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_Hant_TW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_HK_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_MO_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_SG_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zh_TW_locale;
extern const __SEGGER_RTL_locale_data_t __SEGGER_RTL_zu_ZA_locale;

extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_ascii;
extern const __SEGGER_RTL_locale_codeset_t __SEGGER_RTL_codeset_utf8;

extern const char __SEGGER_RTL_data_utf8_period [];
extern const char __SEGGER_RTL_data_utf8_comma [];
extern const char __SEGGER_RTL_data_utf8_space [];
extern const char __SEGGER_RTL_data_utf8_plus [];
extern const char __SEGGER_RTL_data_utf8_minus [];
extern const char __SEGGER_RTL_data_empty_string[];
# 546 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
int __SEGGER_RTL_X_set_time_of_day (const struct timeval *__tp);
int __SEGGER_RTL_X_get_time_of_day (struct timeval *__tp);
const __SEGGER_RTL_locale_t * __SEGGER_RTL_X_find_locale (const char *__locale);
__SEGGER_RTL_FILE * __SEGGER_RTL_X_file_open (const char *__filename, const char *__mode);
__SEGGER_RTL_FILE * __SEGGER_RTL_X_file_dopen (int __descriptor, const char *__mode);
int __SEGGER_RTL_X_file_stat (__SEGGER_RTL_FILE *__stream);
int __SEGGER_RTL_X_file_read (__SEGGER_RTL_FILE *__stream, char *__s, unsigned __len);
int __SEGGER_RTL_X_file_write (__SEGGER_RTL_FILE *__stream, const char *__s, unsigned __len);
int __SEGGER_RTL_X_file_unget (__SEGGER_RTL_FILE *__stream, int __c);
int __SEGGER_RTL_X_file_close (__SEGGER_RTL_FILE *__stream);
int __SEGGER_RTL_X_file_error (__SEGGER_RTL_FILE *__stream);
int __SEGGER_RTL_X_file_flush (__SEGGER_RTL_FILE *__stream);
int __SEGGER_RTL_X_file_eof (__SEGGER_RTL_FILE *__stream);
void __SEGGER_RTL_X_file_clrerr (__SEGGER_RTL_FILE *__stream);
int __SEGGER_RTL_X_file_seek (__SEGGER_RTL_FILE *__stream, long __offset, int __whence);
int __SEGGER_RTL_X_file_getpos (__SEGGER_RTL_FILE *__stream, long *__pos);
int __SEGGER_RTL_X_file_bufsize (__SEGGER_RTL_FILE *__stream);
__SEGGER_RTL_FILE * __SEGGER_RTL_X_file_tmpfile (void);
char * __SEGGER_RTL_X_file_tmpnam (char *__s, unsigned __max);
int __SEGGER_RTL_X_file_remove (const char *__filename);
int __SEGGER_RTL_X_file_rename (const char *__old, const char *__new);
void __attribute__((__weak__)) __SEGGER_RTL_X_heap_lock (void);
void __attribute__((__weak__)) __SEGGER_RTL_X_heap_unlock (void);
int __attribute__((__weak__)) __SEGGER_RTL_X_atomic_lock (void);
void __attribute__((__weak__)) __SEGGER_RTL_X_atomic_unlock (int __state);
int __attribute__((__weak__)) __SEGGER_RTL_X_atomic_is_lock_free (unsigned int __size, void *__ptr);
void __attribute__((__weak__)) __SEGGER_RTL_X_atomic_synchronize (void);
volatile int * __aeabi_errno_addr (void);
void __aeabi_assert (const char *__expression, const char *__filename, int __line);
# 584 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\__SEGGER_RTL.h" 3
void __SEGGER_RTL_execute_at_exit_fns (void);
void __SEGGER_RTL_set_locale_name_buffer (char *__buffer);
int __SEGGER_RTL_mb_max (const struct __SEGGER_RTL_POSIX_locale_s *__loc);
int __SEGGER_RTL_mb_cur_max (void);
void __SEGGER_RTL_init_heap (void *__ptr, unsigned int __size);
# 21 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdint.h" 2 3
# 272 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdint.h" 3
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef int int32_t;
typedef unsigned int uint32_t;
typedef long long int int64_t;
typedef long long unsigned int uint64_t;

typedef signed char int_least8_t;
typedef short int_least16_t;
typedef int int_least32_t;
typedef long long int int_least64_t;
typedef unsigned char uint_least8_t;
typedef unsigned short uint_least16_t;
typedef unsigned int uint_least32_t;
typedef long long unsigned int uint_least64_t;

typedef signed char int_fast8_t;
typedef short int_fast16_t;
typedef int int_fast32_t;
typedef long long int int_fast64_t;
typedef unsigned char uint_fast8_t;
typedef unsigned short uint_fast16_t;
typedef unsigned int uint_fast32_t;
typedef long long unsigned int uint_fast64_t;

typedef int intptr_t;
typedef unsigned int uintptr_t;

typedef long long int intmax_t;
typedef long long unsigned int uintmax_t;
# 15 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h" 2
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdbool.h" 1 3
# 16 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h" 2
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\main.h" 1
# 31 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\main.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h" 1
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 1
# 195 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h" 1
# 27 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_def.h" 1
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_def.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h" 1
# 119 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h" 1
# 69 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h"
typedef enum
{

  NonMaskableInt_IRQn = -14,
  HardFault_IRQn = -13,
  SVCall_IRQn = -5,
  PendSV_IRQn = -2,
  SysTick_IRQn = -1,

  WWDG_IRQn = 0,
  RTC_TAMP_IRQn = 2,
  FLASH_IRQn = 3,
  RCC_IRQn = 4,
  EXTI0_1_IRQn = 5,
  EXTI2_3_IRQn = 6,
  EXTI4_15_IRQn = 7,
  DMA1_Channel1_IRQn = 9,
  DMA1_Channel2_3_IRQn = 10,
  DMA1_Ch4_7_DMAMUX1_OVR_IRQn = 11,
  ADC1_IRQn = 12,
  TIM1_BRK_UP_TRG_COM_IRQn = 13,
  TIM1_CC_IRQn = 14,
  TIM3_IRQn = 16,
  TIM6_IRQn = 17,
  TIM7_IRQn = 18,
  TIM14_IRQn = 19,
  TIM15_IRQn = 20,
  TIM16_IRQn = 21,
  TIM17_IRQn = 22,
  I2C1_IRQn = 23,
  I2C2_IRQn = 24,
  SPI1_IRQn = 25,
  SPI2_IRQn = 26,
  USART1_IRQn = 27,
  USART2_IRQn = 28,
  USART3_4_IRQn = 29,
} IRQn_Type;





# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 1
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
# 63 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_version.h" 1 3
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_version.h" 3
# 64 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 2 3
# 115 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_compiler.h" 1 3
# 54 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_compiler.h" 3
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 1 3
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wsign-conversion"
#pragma GCC diagnostic ignored "-Wconversion"
#pragma GCC diagnostic ignored "-Wunused-parameter"
# 71 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#pragma GCC diagnostic pop



#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
  struct __attribute__((packed, aligned(1))) T_UINT16_WRITE { uint16_t v; };
#pragma GCC diagnostic pop



#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
  struct __attribute__((packed, aligned(1))) T_UINT16_READ { uint16_t v; };
#pragma GCC diagnostic pop



#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
  struct __attribute__((packed, aligned(1))) T_UINT32_WRITE { uint32_t v; };
#pragma GCC diagnostic pop



#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpacked"
#pragma GCC diagnostic ignored "-Wattributes"
  struct __attribute__((packed, aligned(1))) T_UINT32_READ { uint32_t v; };
#pragma GCC diagnostic pop
# 131 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline __attribute__((__noreturn__)) void __cmsis_start(void)
{
  extern void _start(void) __attribute__((__noreturn__));

  typedef struct {
    uint32_t const* src;
    uint32_t* dest;
    uint32_t wlen;
  } __copy_table_t;

  typedef struct {
    uint32_t* dest;
    uint32_t wlen;
  } __zero_table_t;

  extern const __copy_table_t __copy_table_start__;
  extern const __copy_table_t __copy_table_end__;
  extern const __zero_table_t __zero_table_start__;
  extern const __zero_table_t __zero_table_end__;

  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
    for(uint32_t i=0u; i<pTable->wlen; ++i) {
      pTable->dest[i] = pTable->src[i];
    }
  }

  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
    for(uint32_t i=0u; i<pTable->wlen; ++i) {
      pTable->dest[i] = 0u;
    }
  }

  _start();
}
# 196 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __enable_irq(void)
{
  __asm volatile ("cpsie i" : : : "memory");
}







__attribute__((always_inline)) static inline void __disable_irq(void)
{
  __asm volatile ("cpsid i" : : : "memory");
}







__attribute__((always_inline)) static inline uint32_t __get_CONTROL(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, control" : "=r" (result) );
  return(result);
}
# 248 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __set_CONTROL(uint32_t control)
{
  __asm volatile ("MSR control, %0" : : "r" (control) : "memory");
}
# 272 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __get_IPSR(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, ipsr" : "=r" (result) );
  return(result);
}







__attribute__((always_inline)) static inline uint32_t __get_APSR(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, apsr" : "=r" (result) );
  return(result);
}







__attribute__((always_inline)) static inline uint32_t __get_xPSR(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, xpsr" : "=r" (result) );
  return(result);
}







__attribute__((always_inline)) static inline uint32_t __get_PSP(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, psp" : "=r" (result) );
  return(result);
}
# 344 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __set_PSP(uint32_t topOfProcStack)
{
  __asm volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
# 368 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __get_MSP(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, msp" : "=r" (result) );
  return(result);
}
# 398 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __set_MSP(uint32_t topOfMainStack)
{
  __asm volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
# 449 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __get_PRIMASK(void)
{
  uint32_t result;

  __asm volatile ("MRS %0, primask" : "=r" (result) :: "memory");
  return(result);
}
# 479 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __set_PRIMASK(uint32_t priMask)
{
  __asm volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
# 833 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __get_FPSCR(void)
{
# 849 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
  return(0U);

}







__attribute__((always_inline)) static inline void __set_FPSCR(uint32_t fpscr)
{
# 872 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
  (void)fpscr;

}
# 933 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline void __ISB(void)
{
  __asm volatile ("isb 0xF":::"memory");
}







__attribute__((always_inline)) static inline void __DSB(void)
{
  __asm volatile ("dsb 0xF":::"memory");
}







__attribute__((always_inline)) static inline void __DMB(void)
{
  __asm volatile ("dmb 0xF":::"memory");
}
# 967 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __REV(uint32_t value)
{



  uint32_t result;

  __asm volatile ("rev %0, %1" : "=l" (result) : "l" (value) );
  return result;

}
# 986 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __REV16(uint32_t value)
{
  uint32_t result;

  __asm volatile ("rev16 %0, %1" : "=l" (result) : "l" (value) );
  return result;
}
# 1001 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline int16_t __REVSH(int16_t value)
{



  int16_t result;

  __asm volatile ("revsh %0, %1" : "=l" (result) : "l" (value) );
  return result;

}
# 1021 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __ROR(uint32_t op1, uint32_t op2)
{
  op2 %= 32U;
  if (op2 == 0U)
  {
    return op1;
  }
  return (op1 >> op2) | (op1 << (32U - op2));
}
# 1048 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __RBIT(uint32_t value)
{
  uint32_t result;






  uint32_t s = (4U * 8U) - 1U;

  result = value;
  for (value >>= 1U; value != 0U; value >>= 1U)
  {
    result <<= 1U;
    result |= value & 1U;
    s--;
  }
  result <<= s;

  return result;
}
# 1078 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint8_t __CLZ(uint32_t value)
{
# 1089 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
  if (value == 0U)
  {
    return 32U;
  }
  return __builtin_clz(value);
}
# 1382 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline int32_t __SSAT(int32_t val, uint32_t sat)
{
  if ((sat >= 1U) && (sat <= 32U))
  {
    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
    const int32_t min = -1 - max ;
    if (val > max)
    {
      return max;
    }
    else if (val < min)
    {
      return min;
    }
  }
  return val;
}
# 1407 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
__attribute__((always_inline)) static inline uint32_t __USAT(int32_t val, uint32_t sat)
{
  if (sat <= 31U)
  {
    const uint32_t max = ((1U << sat) - 1U);
    if (val > (int32_t)max)
    {
      return max;
    }
    else if (val < 0)
    {
      return 0U;
    }
  }
  return (uint32_t)val;
}
# 2166 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_gcc.h" 3
#pragma GCC diagnostic pop
# 55 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\cmsis_compiler.h" 2 3
# 116 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 2 3
# 210 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef union
{
  struct
  {
    uint32_t _reserved0:28;
    uint32_t V:1;
    uint32_t C:1;
    uint32_t Z:1;
    uint32_t N:1;
  } b;
  uint32_t w;
} APSR_Type;
# 240 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef union
{
  struct
  {
    uint32_t ISR:9;
    uint32_t _reserved0:23;
  } b;
  uint32_t w;
} IPSR_Type;
# 258 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef union
{
  struct
  {
    uint32_t ISR:9;
    uint32_t _reserved0:15;
    uint32_t T:1;
    uint32_t _reserved1:3;
    uint32_t V:1;
    uint32_t C:1;
    uint32_t Z:1;
    uint32_t N:1;
  } b;
  uint32_t w;
} xPSR_Type;
# 297 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef union
{
  struct
  {
    uint32_t nPRIV:1;
    uint32_t SPSEL:1;
    uint32_t _reserved1:30;
  } b;
  uint32_t w;
} CONTROL_Type;
# 328 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef struct
{
  volatile uint32_t ISER[1U];
        uint32_t RESERVED0[31U];
  volatile uint32_t ICER[1U];
        uint32_t RESERVED1[31U];
  volatile uint32_t ISPR[1U];
        uint32_t RESERVED2[31U];
  volatile uint32_t ICPR[1U];
        uint32_t RESERVED3[31U];
        uint32_t RESERVED4[64U];
  volatile uint32_t IP[8U];
} NVIC_Type;
# 355 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef struct
{
  volatile const uint32_t CPUID;
  volatile uint32_t ICSR;

  volatile uint32_t VTOR;



  volatile uint32_t AIRCR;
  volatile uint32_t SCR;
  volatile uint32_t CCR;
        uint32_t RESERVED1;
  volatile uint32_t SHP[2U];
  volatile uint32_t SHCSR;
} SCB_Type;
# 472 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef struct
{
  volatile uint32_t CTRL;
  volatile uint32_t LOAD;
  volatile uint32_t VAL;
  volatile const uint32_t CALIB;
} SysTick_Type;
# 524 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
typedef struct
{
  volatile const uint32_t TYPE;
  volatile uint32_t CTRL;
  volatile uint32_t RNR;
  volatile uint32_t RBAR;
  volatile uint32_t RASR;
} MPU_Type;
# 741 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    __asm volatile("":::"memory");
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    __asm volatile("":::"memory");
  }
}
# 760 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    return((uint32_t)(((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
  }
  else
  {
    return(0U);
  }
}
# 779 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    __DSB();
    __ISB();
  }
}
# 798 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    return((uint32_t)(((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
  }
  else
  {
    return(0U);
  }
}
# 817 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
  }
}
# 832 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
  }
}
# 850 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if ((int32_t)(IRQn) >= 0)
  {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )] = ((uint32_t)(((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )] & ~(0xFFUL << ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL))) |
       (((priority << (8U - 2U)) & (uint32_t)0xFFUL) << ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)));
  }
  else
  {
    ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )] = ((uint32_t)(((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )] & ~(0xFFUL << ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL))) |
       (((priority << (8U - 2U)) & (uint32_t)0xFFUL) << ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)));
  }
}
# 874 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{

  if ((int32_t)(IRQn) >= 0)
  {
    return((uint32_t)(((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[ ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )] >> ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) ) & (uint32_t)0xFFUL) >> (8U - 2U)));
  }
  else
  {
    return((uint32_t)(((((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )] >> ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) ) & (uint32_t)0xFFUL) >> (8U - 2U)));
  }
}
# 899 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(2U)) ? (uint32_t)(2U) : (uint32_t)(7UL - PriorityGroupTmp);
  SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(2U)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(2U));

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
           ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
         );
}
# 926 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(2U)) ? (uint32_t)(2U) : (uint32_t)(7UL - PriorityGroupTmp);
  SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(2U)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(2U));

  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
  *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
}
# 950 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{

  uint32_t vectors = ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->VTOR;



  (* (int *) (vectors + ((int32_t)IRQn + 16) * 4)) = vector;

}
# 970 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t __NVIC_GetVector(IRQn_Type IRQn)
{

  uint32_t vectors = ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->VTOR;



  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + 16) * 4));
}






__attribute__((__noreturn__)) static inline void __NVIC_SystemReset(void)
{
  __DSB();

  ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR = ((0x5FAUL << 16U) |
                 (1UL << 2U));
  __DSB();

  for(;;)
  {
    __asm volatile ("nop");
  }
}







# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\mpu_armv7.h" 1 3
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\mpu_armv7.h" 3
# 183 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\mpu_armv7.h" 3
typedef struct {
  uint32_t RBAR;
  uint32_t RASR;
} ARM_MPU_Region_t;




static inline void ARM_MPU_Enable(uint32_t MPU_Control)
{
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->CTRL = MPU_Control | (1UL );



  __DSB();
  __ISB();
}



static inline void ARM_MPU_Disable(void)
{
  __DMB();



  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->CTRL &= ~(1UL );
}




static inline void ARM_MPU_ClrRegion(uint32_t rnr)
{
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RNR = rnr;
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RASR = 0U;
}





static inline void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RBAR = rbar;
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RASR = rasr;
}






static inline void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RNR = rnr;
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RBAR = rbar;
  ((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RASR = rasr;
}






static inline void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __restrict src, uint32_t len)
{
  uint32_t i;
  for (i = 0U; i < len; ++i)
  {
    dst[i] = src[i];
  }
}





static inline void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{
  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
  while (cnt > 1U) {
    ARM_MPU_OrderedMemcpy(&(((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RBAR), &(table->RBAR), 1U*rowWordSize);
    table += 1U;
    cnt -= 1U;
  }
  ARM_MPU_OrderedMemcpy(&(((MPU_Type *) ((0xE000E000UL) + 0x0D90UL) )->RBAR), &(table->RBAR), cnt*rowWordSize);
}
# 1006 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 2 3
# 1025 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t SCB_GetFPUType(void)
{
    return 0U;
}
# 1056 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Include\\core_cm0plus.h" 3
static inline uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > (0xFFFFFFUL ))
  {
    return (1UL);
  }

  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->LOAD = (uint32_t)(ticks - 1UL);
  __NVIC_SetPriority (SysTick_IRQn, (1UL << 2U) - 1UL);
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->VAL = 0UL;
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->CTRL = (1UL << 2U) |
                   (1UL << 1U) |
                   (1UL );
  return (0UL);
}
# 112 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h" 2
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\system_stm32g0xx.h" 1
# 56 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\system_stm32g0xx.h"
extern uint32_t SystemCoreClock;

extern const uint32_t AHBPrescTable[16];
extern const uint32_t APBPrescTable[8];
# 85 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\system_stm32g0xx.h"
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
# 113 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h" 2
# 122 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h"
typedef struct
{
  volatile uint32_t ISR;
  volatile uint32_t IER;
  volatile uint32_t CR;
  volatile uint32_t CFGR1;
  volatile uint32_t CFGR2;
  volatile uint32_t SMPR;
       uint32_t RESERVED1;
       uint32_t RESERVED2;
  volatile uint32_t AWD1TR;
  volatile uint32_t AWD2TR;
  volatile uint32_t CHSELR;
  volatile uint32_t AWD3TR;
       uint32_t RESERVED3[4];
  volatile uint32_t DR;
       uint32_t RESERVED4[23];
  volatile uint32_t AWD2CR;
  volatile uint32_t AWD3CR;
       uint32_t RESERVED5[3];
  volatile uint32_t CALFACT;
} ADC_TypeDef;

typedef struct
{
  volatile uint32_t CCR;
} ADC_Common_TypeDef;
# 161 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g070xx.h"
typedef struct
{
  volatile uint32_t DR;
  volatile uint32_t IDR;
  volatile uint32_t CR;
       uint32_t RESERVED1;
  volatile uint32_t INIT;
  volatile uint32_t POL;
} CRC_TypeDef;





typedef struct
{
  volatile uint32_t IDCODE;
  volatile uint32_t CR;
  volatile uint32_t APBFZ1;
  volatile uint32_t APBFZ2;
} DBG_TypeDef;




typedef struct
{
  volatile uint32_t CCR;
  volatile uint32_t CNDTR;
  volatile uint32_t CPAR;
  volatile uint32_t CMAR;
} DMA_Channel_TypeDef;

typedef struct
{
  volatile uint32_t ISR;
  volatile uint32_t IFCR;
} DMA_TypeDef;




typedef struct
{
  volatile uint32_t CCR;
}DMAMUX_Channel_TypeDef;

typedef struct
{
  volatile uint32_t CSR;
  volatile uint32_t CFR;
}DMAMUX_ChannelStatus_TypeDef;

typedef struct
{
  volatile uint32_t RGCR;
}DMAMUX_RequestGen_TypeDef;

typedef struct
{
  volatile uint32_t RGSR;
  volatile uint32_t RGCFR;
}DMAMUX_RequestGenStatus_TypeDef;




typedef struct
{
  volatile uint32_t RTSR1;
  volatile uint32_t FTSR1;
  volatile uint32_t SWIER1;
  volatile uint32_t RPR1;
  volatile uint32_t FPR1;
       uint32_t RESERVED1[3];
       uint32_t RESERVED2[5];
       uint32_t RESERVED3[11];
  volatile uint32_t EXTICR[4];
       uint32_t RESERVED4[4];
  volatile uint32_t IMR1;
  volatile uint32_t EMR1;
} EXTI_TypeDef;




typedef struct
{
  volatile uint32_t ACR;
       uint32_t RESERVED1;
  volatile uint32_t KEYR;
  volatile uint32_t OPTKEYR;
  volatile uint32_t SR;
  volatile uint32_t CR;
  volatile uint32_t ECCR;
       uint32_t RESERVED2;
  volatile uint32_t OPTR;
       uint32_t RESERVED3[2];
  volatile uint32_t WRP1AR;
  volatile uint32_t WRP1BR;
       uint32_t RESERVED4[2];
} FLASH_TypeDef;




typedef struct
{
  volatile uint32_t MODER;
  volatile uint32_t OTYPER;
  volatile uint32_t OSPEEDR;
  volatile uint32_t PUPDR;
  volatile uint32_t IDR;
  volatile uint32_t ODR;
  volatile uint32_t BSRR;
  volatile uint32_t LCKR;
  volatile uint32_t AFR[2];
  volatile uint32_t BRR;
} GPIO_TypeDef;





typedef struct
{
  volatile uint32_t CR1;
  volatile uint32_t CR2;
  volatile uint32_t OAR1;
  volatile uint32_t OAR2;
  volatile uint32_t TIMINGR;
  volatile uint32_t TIMEOUTR;
  volatile uint32_t ISR;
  volatile uint32_t ICR;
  volatile uint32_t PECR;
  volatile uint32_t RXDR;
  volatile uint32_t TXDR;
} I2C_TypeDef;




typedef struct
{
  volatile uint32_t KR;
  volatile uint32_t PR;
  volatile uint32_t RLR;
  volatile uint32_t SR;
  volatile uint32_t WINR;
} IWDG_TypeDef;






typedef struct
{
  volatile uint32_t CR1;
       uint32_t RESERVED0;
  volatile uint32_t CR3;
  volatile uint32_t CR4;
  volatile uint32_t SR1;
  volatile uint32_t SR2;
  volatile uint32_t SCR;
       uint32_t RESERVED1;
  volatile uint32_t PUCRA;
  volatile uint32_t PDCRA;
  volatile uint32_t PUCRB;
  volatile uint32_t PDCRB;
  volatile uint32_t PUCRC;
  volatile uint32_t PDCRC;
  volatile uint32_t PUCRD;
  volatile uint32_t PDCRD;
       uint32_t RESERVED2;
       uint32_t RESERVED3;
  volatile uint32_t PUCRF;
  volatile uint32_t PDCRF;
} PWR_TypeDef;




typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t ICSCR;
  volatile uint32_t CFGR;
  volatile uint32_t PLLCFGR;
  volatile uint32_t RESERVED0;
  volatile uint32_t RESERVED1;
  volatile uint32_t CIER;
  volatile uint32_t CIFR;
  volatile uint32_t CICR;
  volatile uint32_t IOPRSTR;
  volatile uint32_t AHBRSTR;
  volatile uint32_t APBRSTR1;
  volatile uint32_t APBRSTR2;
  volatile uint32_t IOPENR;
  volatile uint32_t AHBENR;
  volatile uint32_t APBENR1;
  volatile uint32_t APBENR2;
  volatile uint32_t IOPSMENR;
  volatile uint32_t AHBSMENR;
  volatile uint32_t APBSMENR1;
  volatile uint32_t APBSMENR2;
  volatile uint32_t CCIPR;
  volatile uint32_t RESERVED2;
  volatile uint32_t BDCR;
  volatile uint32_t CSR;
} RCC_TypeDef;




typedef struct
{
  volatile uint32_t TR;
  volatile uint32_t DR;
  volatile uint32_t SSR;
  volatile uint32_t ICSR;
  volatile uint32_t PRER;
  volatile uint32_t WUTR;
  volatile uint32_t CR;
       uint32_t RESERVED0;
       uint32_t RESERVED1;
  volatile uint32_t WPR;
  volatile uint32_t CALR;
  volatile uint32_t SHIFTR;
  volatile uint32_t TSTR;
  volatile uint32_t TSDR;
  volatile uint32_t TSSSR;
       uint32_t RESERVED2;
  volatile uint32_t ALRMAR;
  volatile uint32_t ALRMASSR;
  volatile uint32_t ALRMBR;
  volatile uint32_t ALRMBSSR;
  volatile uint32_t SR;
  volatile uint32_t MISR;
       uint32_t RESERVED3;
  volatile uint32_t SCR;
  volatile uint32_t OR;
} RTC_TypeDef;




typedef struct
{
  volatile uint32_t CR1;
  volatile uint32_t CR2;
       uint32_t RESERVED0;
  volatile uint32_t FLTCR;
       uint32_t RESERVED1[7];
  volatile uint32_t IER;
  volatile uint32_t SR;
  volatile uint32_t MISR;
       uint32_t RESERVED2;
  volatile uint32_t SCR;
       uint32_t RESERVED3[48];
  volatile uint32_t BKP0R;
  volatile uint32_t BKP1R;
  volatile uint32_t BKP2R;
  volatile uint32_t BKP3R;
  volatile uint32_t BKP4R;
} TAMP_TypeDef;




typedef struct
{
  volatile uint32_t CR1;
  volatile uint32_t CR2;
  volatile uint32_t SR;
  volatile uint32_t DR;
  volatile uint32_t CRCPR;
  volatile uint32_t RXCRCR;
  volatile uint32_t TXCRCR;
  volatile uint32_t I2SCFGR;
  volatile uint32_t I2SPR;
} SPI_TypeDef;




typedef struct
{
  volatile uint32_t CFGR1;
       uint32_t RESERVED0[5];
  volatile uint32_t CFGR2;
       uint32_t RESERVED1[25];
  volatile uint32_t IT_LINE_SR[32];
} SYSCFG_TypeDef;




typedef struct
{
  volatile uint32_t CR1;
  volatile uint32_t CR2;
  volatile uint32_t SMCR;
  volatile uint32_t DIER;
  volatile uint32_t SR;
  volatile uint32_t EGR;
  volatile uint32_t CCMR1;
  volatile uint32_t CCMR2;
  volatile uint32_t CCER;
  volatile uint32_t CNT;
  volatile uint32_t PSC;
  volatile uint32_t ARR;
  volatile uint32_t RCR;
  volatile uint32_t CCR1;
  volatile uint32_t CCR2;
  volatile uint32_t CCR3;
  volatile uint32_t CCR4;
  volatile uint32_t BDTR;
  volatile uint32_t DCR;
  volatile uint32_t DMAR;
  volatile uint32_t OR1;
  volatile uint32_t CCMR3;
  volatile uint32_t CCR5;
  volatile uint32_t CCR6;
  volatile uint32_t AF1;
  volatile uint32_t AF2;
  volatile uint32_t TISEL;
} TIM_TypeDef;




typedef struct
{
  volatile uint32_t CR1;
  volatile uint32_t CR2;
  volatile uint32_t CR3;
  volatile uint32_t BRR;
  volatile uint32_t GTPR;
  volatile uint32_t RTOR;
  volatile uint32_t RQR;
  volatile uint32_t ISR;
  volatile uint32_t ICR;
  volatile uint32_t RDR;
  volatile uint32_t TDR;
  volatile uint32_t PRESC;
} USART_TypeDef;





typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t CFR;
  volatile uint32_t SR;
} WWDG_TypeDef;
# 120 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h" 2
# 143 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h"
typedef enum
{
  RESET = 0,
  SET = !RESET
} FlagStatus, ITStatus;

typedef enum
{
  DISABLE = 0,
  ENABLE = !DISABLE
} FunctionalState;


typedef enum
{
  SUCCESS = 0,
  ERROR = !SUCCESS
} ErrorStatus;
# 230 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h" 1
# 231 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/CMSIS/Device/ST/STM32G0xx/Include\\stm32g0xx.h" 2
# 30 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_def.h" 2
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\Legacy/stm32_hal_legacy.h" 1
# 31 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_def.h" 2
# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stddef.h" 1 3
# 72 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stddef.h" 3
typedef unsigned int size_t;
# 86 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stddef.h" 3
typedef unsigned int wchar_t;
# 97 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stddef.h" 3
typedef int ptrdiff_t;
# 110 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stddef.h" 3
typedef double max_align_t;
# 32 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_def.h" 2






typedef enum
{
  HAL_OK = 0x00U,
  HAL_ERROR = 0x01U,
  HAL_BUSY = 0x02U,
  HAL_TIMEOUT = 0x03U
} HAL_StatusTypeDef;




typedef enum
{
  HAL_UNLOCKED = 0x00U,
  HAL_LOCKED = 0x01U
} HAL_LockTypeDef;
# 28 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h" 2
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h" 1
# 1248 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_HSE_EnableCSS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (19U))));
}






static inline void LL_RCC_HSE_EnableBypass(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (18U))));
}






static inline void LL_RCC_HSE_DisableBypass(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) &= ~((0x1UL << (18U))));
}






static inline void LL_RCC_HSE_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (16U))));
}






static inline void LL_RCC_HSE_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) &= ~((0x1UL << (16U))));
}






static inline uint32_t LL_RCC_HSE_IsReady(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) & ((0x1UL << (17U)))) == ((0x1UL << (17U)))) ? 1UL : 0UL);
}
# 1317 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_HSI_EnableInStopMode(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (9U))));
}






static inline void LL_RCC_HSI_DisableInStopMode(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) &= ~((0x1UL << (9U))));
}






static inline uint32_t LL_RCC_HSI_IsEnabledInStopMode(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}






static inline void LL_RCC_HSI_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (8U))));
}






static inline void LL_RCC_HSI_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) &= ~((0x1UL << (8U))));
}






static inline uint32_t LL_RCC_HSI_IsReady(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) & ((0x1UL << (10U)))) == ((0x1UL << (10U)))) ? 1UL : 0UL);
}
# 1379 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_HSI_GetCalibration(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->ICSCR) & ((0xFFUL << (0U)))) >> (0U));
}
# 1393 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->ICSCR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->ICSCR))) & (~((0x7FUL << (8U))))) | (Value << (8U)))));
}






static inline uint32_t LL_RCC_HSI_GetCalibTrimming(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->ICSCR) & ((0x7FUL << (8U)))) >> (8U));
}
# 1471 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSE_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (0U))));
}






static inline void LL_RCC_LSE_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (0U))));
}






static inline void LL_RCC_LSE_EnableBypass(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (2U))));
}






static inline void LL_RCC_LSE_DisableBypass(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (2U))));
}
# 1517 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR))) & (~((0x3UL << (3U))))) | (LSEDrive))));
}
# 1531 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_LSE_GetDriveCapability(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x3UL << (3U)))));
}






static inline void LL_RCC_LSE_EnableCSS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (5U))));
}
# 1553 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSE_DisableCSS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (5U))));
}






static inline uint32_t LL_RCC_LSE_IsReady(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_LSE_IsCSSDetected(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x1UL << (6U)))) == ((0x1UL << (6U)))) ? 1UL : 0UL);
}
# 1591 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSI_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) |= ((0x1UL << (0U))));
}






static inline void LL_RCC_LSI_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) &= ~((0x1UL << (0U))));
}






static inline uint32_t LL_RCC_LSI_IsReady(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}
# 1629 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSCO_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (24U))));
}






static inline void LL_RCC_LSCO_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (24U))));
}
# 1652 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_LSCO_SetSource(uint32_t Source)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR))) & (~((0x1UL << (25U))))) | (Source))));
}
# 1664 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_LSCO_GetSource(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x1UL << (25U)))));
}
# 1688 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetSysClkSource(uint32_t Source)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR))) & (~((0x7UL << (0U))))) | (Source))));
}
# 1703 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetSysClkSource(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR) & ((0x7UL << (3U)))));
}
# 1723 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR))) & (~((0xFUL << (8U))))) | (Prescaler))));
}
# 1739 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR))) & (~((0x7UL << (12U))))) | (Prescaler))));
}
# 1760 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetHSIDiv(uint32_t HSIDiv)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR))) & (~((0x7UL << (11U))))) | (HSIDiv))));
}
# 1778 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetAHBPrescaler(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR) & ((0xFUL << (8U)))));
}
# 1793 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetAPB1Prescaler(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR) & ((0x7UL << (12U)))));
}
# 1813 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetHSIDiv(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) & ((0x7UL << (11U)))));
}
# 1854 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CFGR))) & (~((0x7UL << (24U)) | (0x7UL << (28U))))) | (MCOxSource | MCOxPrescaler))));
}
# 1935 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR))) & (~((USARTxSource >> 16U)))) | ((USARTxSource & 0x0000FFFFU)))));
}
# 1976 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR))) & (~((I2CxSource >> 16U)))) | ((I2CxSource & 0x0000FFFFU)))));
}
# 2113 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetADCClockSource(uint32_t ADCxSource)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR))) & (~((0x3UL << (30U))))) | (ADCxSource))));
}
# 2149 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetI2SClockSource(uint32_t I2SxSource)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR))) & (~((0x3UL << (14U))))) | (I2SxSource))));
}
# 2177 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetUSARTClockSource(uint32_t USARTx)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR) & (USARTx)) | (USARTx << 16U));
}
# 2222 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetI2CClockSource(uint32_t I2Cx)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR) & (I2Cx)) | (I2Cx << 16U));
}
# 2364 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetADCClockSource(uint32_t ADCx)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR) & (ADCx)));
}
# 2403 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CCIPR) & (I2Sx)));
}
# 2429 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_SetRTCClockSource(uint32_t Source)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR))) & (~((0x3UL << (8U))))) | (Source))));
}
# 2443 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_GetRTCClockSource(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x3UL << (8U)))));
}






static inline void LL_RCC_EnableRTC(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (15U))));
}






static inline void LL_RCC_DisableRTC(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (15U))));
}






static inline uint32_t LL_RCC_IsEnabledRTC(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) & ((0x1UL << (15U)))) == ((0x1UL << (15U)))) ? 1UL : 0UL);
}






static inline void LL_RCC_ForceBackupDomainReset(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) |= ((0x1UL << (16U))));
}






static inline void LL_RCC_ReleaseBackupDomainReset(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->BDCR) &= ~((0x1UL << (16U))));
}
# 2512 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_Enable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) |= ((0x1UL << (24U))));
}







static inline void LL_RCC_PLL_Disable(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) &= ~((0x1UL << (24U))));
}






static inline uint32_t LL_RCC_PLL_IsReady(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CR) & ((0x1UL << (25U)))) == ((0x1UL << (25U)))) ? 1UL : 0UL);
}
# 2570 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR))) & (~((0x3UL << (0U)) | (0x7UL << (4U)) | (0x7FUL << (8U)) | (0x7UL << (29U))))) | (Source | PLLM | (PLLN << (8U)) | PLLR))));

}
# 2635 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR))) & (~((0x3UL << (0U)) | (0x7UL << (4U)) | (0x7FUL << (8U)) | (0x1FUL << (17U))))) | (Source | PLLM | (PLLN << (8U)) | PLLP))));

}
# 2700 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_ConfigDomain_I2S1(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR))) & (~((0x3UL << (0U)) | (0x7UL << (4U)) | (0x7FUL << (8U)) | (0x1FUL << (17U))))) | (Source | PLLM | (PLLN << (8U)) | PLLP))));

}
# 2993 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_PLL_GetN(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x7FUL << (8U)))) >> (8U));
}
# 3035 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_PLL_GetP(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x1FUL << (17U)))));
}
# 3073 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_PLL_GetR(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x7UL << (29U)))));
}
# 3086 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
{
  (((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR)) = ((((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR))) & (~((0x3UL << (0U))))) | (PLLSource))));
}
# 3099 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_PLL_GetMainSource(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x3UL << (0U)))));
}
# 3117 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_PLL_GetDivider(void)
{
  return (uint32_t)(((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x7UL << (4U)))));
}
# 3129 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_EnableDomain_ADC(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) |= ((0x1UL << (16U))));
}
# 3144 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_DisableDomain_ADC(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) &= ~((0x1UL << (16U))));
}






static inline uint32_t LL_RCC_PLL_IsEnabledDomain_ADC(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? 1UL : 0UL);
}
# 3166 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_EnableDomain_I2S1(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) |= ((0x1UL << (16U))));
}
# 3195 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_DisableDomain_I2S1(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) &= ~((0x1UL << (16U))));
}






static inline uint32_t LL_RCC_PLL_IsEnabledDomain_I2S1(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? 1UL : 0UL);
}
# 3437 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_EnableDomain_SYS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) |= ((0x1UL << (28U))));
}
# 3450 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_PLL_DisableDomain_SYS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) &= ~((0x1UL << (28U))));
}






static inline uint32_t LL_RCC_PLL_IsEnabledDomain_SYS(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->PLLCFGR) & ((0x1UL << (28U)))) == ((0x1UL << (28U)))) ? 1UL : 0UL);
}
# 3480 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_ClearFlag_LSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (0U))));
}






static inline void LL_RCC_ClearFlag_LSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (1U))));
}






static inline void LL_RCC_ClearFlag_HSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (3U))));
}






static inline void LL_RCC_ClearFlag_HSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (4U))));
}






static inline void LL_RCC_ClearFlag_PLLRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (5U))));
}
# 3541 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_ClearFlag_HSECSS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (8U))));
}






static inline void LL_RCC_ClearFlag_LSECSS(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CICR) |= ((0x1UL << (9U))));
}






static inline uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (5U)))) == ((0x1UL << (5U)))) ? 1UL : 0UL);
}
# 3623 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_LSECSS(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIFR) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (29U)))) == ((0x1UL << (29U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (31U)))) == ((0x1UL << (31U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_OBLRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (25U)))) == ((0x1UL << (25U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_PINRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (26U)))) == ((0x1UL << (26U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (28U)))) == ((0x1UL << (28U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (30U)))) == ((0x1UL << (30U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsActiveFlag_PWRRST(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) & ((0x1UL << (27U)))) == ((0x1UL << (27U)))) ? 1UL : 0UL);
}






static inline void LL_RCC_ClearResetFlags(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CSR) |= ((0x1UL << (23U))));
}
# 3731 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_EnableIT_LSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) |= ((0x1UL << (0U))));
}






static inline void LL_RCC_EnableIT_LSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) |= ((0x1UL << (1U))));
}






static inline void LL_RCC_EnableIT_HSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) |= ((0x1UL << (3U))));
}






static inline void LL_RCC_EnableIT_HSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) |= ((0x1UL << (4U))));
}






static inline void LL_RCC_EnableIT_PLLRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) |= ((0x1UL << (5U))));
}
# 3793 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline void LL_RCC_DisableIT_LSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) &= ~((0x1UL << (0U))));
}






static inline void LL_RCC_DisableIT_LSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) &= ~((0x1UL << (1U))));
}






static inline void LL_RCC_DisableIT_HSIRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) &= ~((0x1UL << (3U))));
}






static inline void LL_RCC_DisableIT_HSERDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) &= ~((0x1UL << (4U))));
}






static inline void LL_RCC_DisableIT_PLLRDY(void)
{
  ((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) &= ~((0x1UL << (5U))));
}
# 3855 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}
# 3897 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_rcc.h"
static inline uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}






static inline uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
{
  return ((((((RCC_TypeDef *) (((0x40000000UL) + 0x00020000UL) + 0x00001000UL))->CIER) & ((0x1UL << (5U)))) == ((0x1UL << (5U)))) ? 1UL : 0UL);
}
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h" 2
# 265 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
typedef struct
{
  uint32_t PLLState;


  uint32_t PLLSource;


  uint32_t PLLM;


  uint32_t PLLN;


  uint32_t PLLP;
# 289 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
  uint32_t PLLR;



} RCC_PLLInitTypeDef;




typedef struct
{
  uint32_t OscillatorType;


  uint32_t HSEState;


  uint32_t LSEState;


  uint32_t HSIState;


  uint32_t HSIDiv;


  uint32_t HSICalibrationValue;


  uint32_t LSIState;
# 327 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
  RCC_PLLInitTypeDef PLL;

} RCC_OscInitTypeDef;




typedef struct
{
  uint32_t ClockType;


  uint32_t SYSCLKSource;


  uint32_t AHBCLKDivider;


  uint32_t APB1CLKDivider;



} RCC_ClkInitTypeDef;
# 3106 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h" 1
# 46 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
typedef struct
{
  uint32_t PeriphClockSelection;


  uint32_t Usart1ClockSelection;


  uint32_t Usart2ClockSelection;
# 73 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
  uint32_t I2c1ClockSelection;







  uint32_t I2s1ClockSelection;
# 99 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
  uint32_t AdcClockSelection;
# 113 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
  uint32_t RTCClockSelection;
# 123 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
} RCC_PeriphCLKInitTypeDef;
# 1193 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
# 1205 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc_ex.h"
void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource);
void HAL_RCCEx_DisableLSCO(void);
# 3107 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h" 2
# 3119 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
HAL_StatusTypeDef HAL_RCC_DeInit(void);
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct);
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency);
# 3132 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rcc.h"
void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv);
void HAL_RCC_EnableCSS(void);
void HAL_RCC_EnableLSECSS(void);
void HAL_RCC_DisableLSECSS(void);
uint32_t HAL_RCC_GetSysClockFreq(void);
uint32_t HAL_RCC_GetHCLKFreq(void);
uint32_t HAL_RCC_GetPCLK1Freq(void);
void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct);
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency);
uint32_t HAL_RCC_GetResetSource(void);

void HAL_RCC_NMI_IRQHandler(void);

void HAL_RCC_CSSCallback(void);
void HAL_RCC_LSECSSCallback(void);
# 196 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h"
typedef struct
{
  uint32_t Pin;


  uint32_t Mode;


  uint32_t Pull;


  uint32_t Speed;


  uint32_t Alternate;

} GPIO_InitTypeDef;




typedef enum
{
  GPIO_PIN_RESET = 0U,
  GPIO_PIN_SET
} GPIO_PinState;
# 306 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio_ex.h" 1
# 307 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h" 2
# 320 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h"
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
# 333 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_gpio.h"
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin);
# 200 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h" 1
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h" 1
# 29 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h" 1
# 524 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
{
  (void)(DMAMUXx);
  ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR)) = (((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR))) & (~((0x3FUL << (0U))))) | (Request))));
}
# 615 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (uint32_t)((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x3FUL << (0U)))));
}
# 645 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
{
  (void)(DMAMUXx);
  ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR)) = (((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR))) & (~((0x1FUL << (19U))))) | (((RequestNb - 1U) << (19U))))));
}
# 674 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (uint32_t)((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x1FUL << (19U))))) >> (19U)) + 1U);
}
# 708 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
{
  (void)(DMAMUXx);
  ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR)) = (((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR))) & (~((0x3UL << (17U))))) | (Polarity))));
}
# 741 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (uint32_t)((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x3UL << (17U)))));
}
# 770 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_EnableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) |= ((0x1UL << (9U))));
}
# 799 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_DisableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) &= ~((0x1UL << (9U))));
}
# 828 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsEnabledEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}
# 857 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_EnableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) |= ((0x1UL << (16U))));
}
# 886 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_DisableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) &= ~((0x1UL << (16U))));
}
# 915 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsEnabledSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? 1UL : 0UL);
}
# 968 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
{
  (void)(DMAMUXx);
  ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR)) = (((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR))) & (~((0x1FUL << (24U))))) | (SyncID))));
}
# 1020 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return (uint32_t)((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x1FUL << (24U)))));
}
# 1037 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_EnableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) |= ((0x1UL << (16U))));

}
# 1055 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_DisableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) &= ~((0x1UL << (16U))));

}
# 1073 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsEnabledRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? 1UL : 0UL);

}
# 1096 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                                     uint32_t Polarity)
{
  (void)(DMAMUXx);
  (((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR)) = ((((((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR))) & (~((0x3UL << (17U))))) | (Polarity))));

}
# 1119 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  return (uint32_t)(((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) & ((0x3UL << (17U)))));

}
# 1139 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                               uint32_t RequestNb)
{
  (void)(DMAMUXx);
  (((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR)) = ((((((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR))) & (~((0x1FUL << (19U))))) | ((RequestNb - 1U) << (19U)))));

}
# 1158 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  return (uint32_t)((((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) & ((0x1FUL << (19U)))) >> (19U)) + 1U);

}
# 1200 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_SetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                                  uint32_t RequestSignalID)
{
  (void)(DMAMUXx);
  (((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR)) = ((((((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR))) & (~((0x1FUL << (0U))))) | (RequestSignalID))));

}
# 1242 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_GetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  return (uint32_t)(((((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + (0x00000004UL * (RequestGenChannel)))))->RGCR) & ((0x1FUL << (0U)))));

}
# 1263 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsActiveFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}
# 1324 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsActiveFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (5U)))) == ((0x1UL << (5U)))) ? 1UL : 0UL);
}
# 1338 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsActiveFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CSR) & ((0x1UL << (6U)))) == ((0x1UL << (6U)))) ? 1UL : 0UL);
}
# 1421 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsActiveFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGSR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGSR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGSR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMAMUX_IsActiveFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  return ((((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGSR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}







static inline void LL_DMAMUX_ClearFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (0U))));
}







static inline void LL_DMAMUX_ClearFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (1U))));
}







static inline void LL_DMAMUX_ClearFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (2U))));
}







static inline void LL_DMAMUX_ClearFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (3U))));
}







static inline void LL_DMAMUX_ClearFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (4U))));
}
# 1530 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_ClearFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (5U))));
}
# 1544 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_ClearFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_ChannelStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000080UL))->CFR) |= ((0x1UL << (6U))));
}
# 1627 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_ClearFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGCFR) |= ((0x1UL << (0U))));
}







static inline void LL_DMAMUX_ClearFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGCFR) |= ((0x1UL << (1U))));
}







static inline void LL_DMAMUX_ClearFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGCFR) |= ((0x1UL << (2U))));
}







static inline void LL_DMAMUX_ClearFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
  (void)(DMAMUXx);
  ((((DMAMUX_RequestGenStatus_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000140UL))->RGCFR) |= ((0x1UL << (3U))));
}
# 1700 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_EnableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) |= ((0x1UL << (8U))));
}
# 1729 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_DisableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) &= ~((0x1UL << (8U))));
}
# 1758 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsEnabledIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
  (void)(DMAMUXx);
  return ((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel)->CCR) & ((0x1UL << (8U))))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}
# 1775 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_EnableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + RequestGenChannel)->RGCR) |= ((0x1UL << (8U))));
}
# 1792 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline void LL_DMAMUX_DisableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  (((((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + RequestGenChannel)->RGCR) &= ~((0x1UL << (8U))));
}
# 1809 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dmamux.h"
static inline uint32_t LL_DMAMUX_IsEnabledIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
  (void)(DMAMUXx);
  return (((((((DMAMUX_RequestGen_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL) + 0x00000100UL)) + RequestGenChannel)->RGCR) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}
# 30 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h" 2
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static const uint8_t CHANNEL_OFFSET_TAB[] =
{
  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x00000008UL) - (((0x40000000UL) + 0x00020000UL))),
  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x0000001CUL) - (((0x40000000UL) + 0x00020000UL))),
  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x00000030UL) - (((0x40000000UL) + 0x00020000UL))),
  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x00000044UL) - (((0x40000000UL) + 0x00020000UL))),
  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x00000058UL) - (((0x40000000UL) + 0x00020000UL))),

  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x0000006CUL) - (((0x40000000UL) + 0x00020000UL))),


  (uint8_t)(((((0x40000000UL) + 0x00020000UL)) + 0x00000080UL) - (((0x40000000UL) + 0x00020000UL))),

};
# 500 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_EnableChannel(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) |= ((0x1UL << (0U))));
}
# 520 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_DisableChannel(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) &= ~((0x1UL << (0U))));
}
# 540 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsEnabledChannel(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return ((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);

}
# 576 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ConfigTransfer(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x1UL << (4U)) | (0x1UL << (14U)) | (0x1UL << (5U)) | (0x1UL << (6U)) | (0x1UL << (7U)) | (0x3UL << (8U)) | (0x3UL << (10U)) | (0x3UL << (12U))))) | (Configuration))));


}
# 603 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetDataTransferDirection(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x1UL << (4U)) | (0x1UL << (14U))))) | (Direction))));

}
# 628 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetDataTransferDirection(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (4U)) | (0x1UL << (14U)))));

}
# 654 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetMode(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x1UL << (5U))))) | (Mode))));

}
# 677 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetMode(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (5U)))));

}
# 701 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetPeriphIncMode(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x1UL << (6U))))) | (PeriphOrM2MSrcIncMode))));

}
# 724 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetPeriphIncMode(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (6U)))));

}
# 748 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetMemoryIncMode(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x1UL << (7U))))) | (MemoryOrM2MDstIncMode))));

}
# 771 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetMemoryIncMode(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (7U)))));

}
# 796 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetPeriphSize(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x3UL << (8U))))) | (PeriphOrM2MSrcDataSize))));

}
# 820 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetPeriphSize(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x3UL << (8U)))));

}
# 845 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetMemorySize(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x3UL << (10U))))) | (MemoryOrM2MDstDataSize))));

}
# 869 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetMemorySize(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x3UL << (10U)))));

}
# 895 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetChannelPriorityLevel(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR))) & (~((0x3UL << (12U))))) | (Priority))));

}
# 920 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetChannelPriorityLevel(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x3UL << (12U)))));

}
# 944 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetDataLength(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CNDTR)) = ((((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CNDTR))) & (~((0xFFFFUL << (0U))))) | (NbData))));

}
# 967 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetDataLength(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CNDTR) & ((0xFFFFUL << (0U)))));

}
# 997 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ConfigAddresses(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
                                            uint32_t DstAddress, uint32_t Direction)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;

  if (Direction == (0x1UL << (4U)))
  {
    ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR) = (SrcAddress));
    ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR) = (DstAddress));
  }

  else
  {
    ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR) = (SrcAddress));
    ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR) = (DstAddress));
  }
}
# 1032 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetMemoryAddress(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR) = (MemoryAddress));
}
# 1055 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetPeriphAddress(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR) = (PeriphAddress));
}
# 1076 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetMemoryAddress(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)));
}
# 1097 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetPeriphAddress(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR)));
}
# 1120 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetM2MSrcAddress(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR) = (MemoryAddress));
}
# 1143 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetM2MDstAddress(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR) = (MemoryAddress));
}
# 1164 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetM2MSrcAddress(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR)));
}
# 1185 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetM2MDstAddress(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return (((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)));
}
# 1270 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_SetPeriphRequest(const DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
{
  uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)((DMA_TypeDef *) (((0x40000000UL) + 0x00020000UL)))) >> 10U) * 7U);
  ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel + dmamux_ccr_offset)->CCR)) = (((((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel + dmamux_ccr_offset)->CCR))) & (~((0x3FUL << (0U))))) | (Request))));
}
# 1354 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_GetPeriphRequest(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)((DMA_TypeDef *) (((0x40000000UL) + 0x00020000UL)))) >> 10U) * 7U);
  return ((((((DMAMUX_Channel_TypeDef *) ((((0x40000000UL) + 0x00020000UL) + 0x00000800UL))) + Channel + dmamux_ccr_offset)->CCR) & ((0x3FUL << (0U)))));
}
# 1374 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_GI1(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_GI2(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_GI3(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_GI4(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (12U)))) == ((0x1UL << (12U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_GI5(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? 1UL : 0UL);
}
# 1430 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_GI6(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (20U)))) == ((0x1UL << (20U)))) ? 1UL : 0UL);
}
# 1443 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_GI7(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (24U)))) == ((0x1UL << (24U)))) ? 1UL : 0UL);
}
# 1455 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TC1(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TC2(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (5U)))) == ((0x1UL << (5U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TC3(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TC4(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (13U)))) == ((0x1UL << (13U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TC5(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (17U)))) == ((0x1UL << (17U)))) ? 1UL : 0UL);
}
# 1511 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TC6(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (21U)))) == ((0x1UL << (21U)))) ? 1UL : 0UL);
}
# 1524 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TC7(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (25U)))) == ((0x1UL << (25U)))) ? 1UL : 0UL);
}
# 1536 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_HT1(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_HT2(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (6U)))) == ((0x1UL << (6U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_HT3(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (10U)))) == ((0x1UL << (10U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_HT4(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (14U)))) == ((0x1UL << (14U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_HT5(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (18U)))) == ((0x1UL << (18U)))) ? 1UL : 0UL);
}
# 1592 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_HT6(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (22U)))) == ((0x1UL << (22U)))) ? 1UL : 0UL);
}
# 1605 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_HT7(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (26U)))) == ((0x1UL << (26U)))) ? 1UL : 0UL);
}
# 1617 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TE1(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TE2(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (7U)))) == ((0x1UL << (7U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TE3(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (11U)))) == ((0x1UL << (11U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TE4(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (15U)))) == ((0x1UL << (15U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_DMA_IsActiveFlag_TE5(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (19U)))) == ((0x1UL << (19U)))) ? 1UL : 0UL);
}
# 1673 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TE6(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (23U)))) == ((0x1UL << (23U)))) ? 1UL : 0UL);
}
# 1686 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsActiveFlag_TE7(const DMA_TypeDef *DMAx)
{
  return ((((DMAx->ISR) & ((0x1UL << (27U)))) == ((0x1UL << (27U)))) ? 1UL : 0UL);
}
# 1702 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (0U))));
}
# 1717 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (4U))));
}
# 1732 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (8U))));
}
# 1747 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (12U))));
}
# 1762 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (16U))));
}
# 1778 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (20U))));
}
# 1795 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (24U))));
}
# 1807 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (1U))));
}







static inline void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (5U))));
}







static inline void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (9U))));
}







static inline void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (13U))));
}







static inline void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (17U))));
}
# 1863 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (21U))));
}
# 1876 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (25U))));
}
# 1888 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (2U))));
}







static inline void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (6U))));
}







static inline void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (10U))));
}







static inline void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (14U))));
}







static inline void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (18U))));
}
# 1944 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (22U))));
}
# 1957 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (26U))));
}
# 1969 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (3U))));
}







static inline void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (7U))));
}







static inline void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (11U))));
}







static inline void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (15U))));
}







static inline void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (19U))));
}
# 2025 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (23U))));
}
# 2038 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
{
  ((DMAx->IFCR) = ((0x1UL << (27U))));
}
# 2065 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_EnableIT_TC(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) |= ((0x1UL << (1U))));
}
# 2085 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_EnableIT_HT(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) |= ((0x1UL << (2U))));
}
# 2105 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_EnableIT_TE(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) |= ((0x1UL << (3U))));
}
# 2125 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_DisableIT_TC(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) &= ~((0x1UL << (1U))));
}
# 2145 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_DisableIT_HT(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) &= ~((0x1UL << (2U))));
}
# 2165 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline void LL_DMA_DisableIT_TE(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  ((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) &= ~((0x1UL << (3U))));
}
# 2185 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsEnabledIT_TC(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return ((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);

}
# 2206 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsEnabledIT_HT(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return ((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);

}
# 2227 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_dma.h"
static inline uint32_t LL_DMA_IsEnabledIT_TE(const DMA_TypeDef *DMAx, uint32_t Channel)
{
  uint32_t dma_base_addr = (uint32_t)DMAx;
  return ((((((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);

}
# 30 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h" 2
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
typedef struct
{
  uint32_t Request;


  uint32_t Direction;



  uint32_t PeriphInc;


  uint32_t MemInc;


  uint32_t PeriphDataAlignment;


  uint32_t MemDataAlignment;


  uint32_t Mode;




  uint32_t Priority;

} DMA_InitTypeDef;




typedef enum
{
  HAL_DMA_STATE_RESET = 0x00U,
  HAL_DMA_STATE_READY = 0x01U,
  HAL_DMA_STATE_BUSY = 0x02U,
  HAL_DMA_STATE_TIMEOUT = 0x03U,
} HAL_DMA_StateTypeDef;




typedef enum
{
  HAL_DMA_FULL_TRANSFER = 0x00U,
  HAL_DMA_HALF_TRANSFER = 0x01U
} HAL_DMA_LevelCompleteTypeDef;




typedef enum
{
  HAL_DMA_XFER_CPLT_CB_ID = 0x00U,
  HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U,
  HAL_DMA_XFER_ERROR_CB_ID = 0x02U,
  HAL_DMA_XFER_ABORT_CB_ID = 0x03U,
  HAL_DMA_XFER_ALL_CB_ID = 0x04U

} HAL_DMA_CallbackIDTypeDef;




typedef struct __DMA_HandleTypeDef
{
  DMA_Channel_TypeDef *Instance;

  DMA_InitTypeDef Init;

  HAL_LockTypeDef Lock;

  volatile HAL_DMA_StateTypeDef State;

  void *Parent;

  void (* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma);

  void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma);

  void (* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma);

  void (* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma);

  volatile uint32_t ErrorCode;





  uint32_t ChannelIndex;

  DMAMUX_Channel_TypeDef *DMAmuxChannel;

  DMAMUX_ChannelStatus_TypeDef *DMAmuxChannelStatus;

  uint32_t DMAmuxChannelStatusMask;

  DMAMUX_RequestGen_TypeDef *DMAmuxRequestGen;

  DMAMUX_RequestGenStatus_TypeDef *DMAmuxRequestGenStatus;

  uint32_t DMAmuxRequestGenStatusMask;
} DMA_HandleTypeDef;
# 698 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma_ex.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma_ex.h"
typedef struct
{
  uint32_t SyncSignalID;


  uint32_t SyncPolarity;


  FunctionalState SyncEnable;


  FunctionalState EventEnable;


  uint32_t RequestNumber;



} HAL_DMA_MuxSyncConfigTypeDef;





typedef struct
{
  uint32_t SignalID;


  uint32_t Polarity;


  uint32_t RequestNumber;


} HAL_DMA_MuxRequestGeneratorConfigTypeDef;
# 206 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma_ex.h"
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
                                                      HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma);



HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);


void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
# 699 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h" 2
# 710 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma);
# 720 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress,
                                   uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel,
                                          uint32_t Timeout);
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma));
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
# 739 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_dma.h"
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
# 204 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_cortex.h" 1
# 49 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_cortex.h"
typedef struct
{
  uint8_t Enable;

  uint8_t Number;

  uint32_t BaseAddress;

  uint8_t Size;

  uint8_t SubRegionDisable;

  uint8_t TypeExtField;

  uint8_t AccessPermission;

  uint8_t DisableExec;

  uint8_t IsShareable;

  uint8_t IsCacheable;

  uint8_t IsBufferable;

} MPU_Region_InitTypeDef;
# 250 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_cortex.h"
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
void HAL_NVIC_SystemReset(void);
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
# 264 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_cortex.h"
uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn);
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
void HAL_SYSTICK_IRQHandler(void);
void HAL_SYSTICK_Callback(void);


void HAL_MPU_Enable(uint32_t MPU_Control);
void HAL_MPU_Disable(void);
void HAL_MPU_EnableRegion(uint32_t RegionNumber);
void HAL_MPU_DisableRegion(uint32_t RegionNumber);
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
# 208 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h" 1
# 31 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h" 1
# 1953 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_DMA_GetRegAddr(const ADC_TypeDef *ADCx, uint32_t Register)
{

  (void)(Register);


  return (uint32_t) &(ADCx->DR);
}
# 2002 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
{
  (((ADCxy_COMMON->CCR)) = ((((((ADCxy_COMMON->CCR))) & (~((0xFUL << (18U))))) | (CommonClock))));
}
# 2031 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetCommonClock(const ADC_Common_TypeDef *ADCxy_COMMON)
{
  return (uint32_t)(((ADCxy_COMMON->CCR) & ((0xFUL << (18U)))));
}
# 2052 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonFrequencyMode)
{
  (((ADCxy_COMMON->CCR)) = ((((((ADCxy_COMMON->CCR))) & (~((0x1UL << (25U))))) | (CommonFrequencyMode))));
}
# 2068 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetCommonFrequencyMode(const ADC_Common_TypeDef *ADCxy_COMMON)
{
  return (uint32_t)(((ADCxy_COMMON->CCR) & ((0x1UL << (25U)))));
}
# 2111 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
{
  (((ADCxy_COMMON->CCR)) = ((((((ADCxy_COMMON->CCR))) & (~((0x1UL << (22U)) | (0x1UL << (23U)) | (0x1UL << (24U))))) | (PathInternal))));
}
# 2153 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
{
  ((ADCxy_COMMON->CCR) |= (PathInternal));
}
# 2183 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
{
  ((ADCxy_COMMON->CCR) &= ~(PathInternal));
}
# 2205 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetCommonPathInternalCh(const ADC_Common_TypeDef *ADCxy_COMMON)
{
  return (uint32_t)(((ADCxy_COMMON->CCR) & ((0x1UL << (22U)) | (0x1UL << (23U)) | (0x1UL << (24U)))));
}
# 2241 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
{
  (((ADCx->CFGR2)) = ((((((ADCx->CFGR2))) & (~((0x3UL << (30U))))) | (ClockSource))));
}
# 2265 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetClock(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0x3UL << (30U)))));
}
# 2285 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
{
  (((ADCx->CALFACT)) = ((((((ADCx->CALFACT))) & (~((0x7FUL << (0U))))) | (CalibrationFactor))));


}
# 2301 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetCalibrationFactor(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CALFACT) & ((0x7FUL << (0U)))));
}
# 2322 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x3UL << (3U))))) | (Resolution))));
}
# 2339 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetResolution(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x3UL << (3U)))));
}
# 2358 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (5U))))) | (DataAlignment))));
}
# 2373 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetDataAlignment(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (5U)))));
}
# 2430 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~(((0x1UL << (14U)) | (0x1UL << (15U)))))) | (LowPowerMode))));
}
# 2483 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetLowPowerMode(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & (((0x1UL << (14U)) | (0x1UL << (15U))))));
}
# 2513 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetTriggerFrequencyMode(ADC_TypeDef *ADCx, uint32_t TriggerFrequencyMode)
{
  (((ADCx->CFGR2)) = ((((((ADCx->CFGR2))) & (~((0x1UL << (29U))))) | (TriggerFrequencyMode))));
}
# 2526 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetTriggerFrequencyMode(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0x1UL << (29U)))));
}
# 2575 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTimeY,
                                                          uint32_t SamplingTime)
{
  (((ADCx->SMPR)) = ((((((ADCx->SMPR))) & (~((0x7UL << (0U)) << (SamplingTimeY & (( 4UL) | ( 0UL)))))) | (SamplingTime << (SamplingTimeY & (( 4UL) | ( 0UL)))))));


}
# 2608 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetSamplingTimeCommonChannels(const ADC_TypeDef *ADCx, uint32_t SamplingTimeY)
{
  return (uint32_t)((((ADCx->SMPR) & ((0x7UL << (0U)) << (SamplingTimeY & (( 4UL) | ( 0UL))))))
                    >> (SamplingTimeY & (( 4UL) | ( 0UL))));
}
# 2657 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x3UL << (10U)) | (0x7UL << (6U))))) | (TriggerSource))));
}
# 2689 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetTriggerSource(const ADC_TypeDef *ADCx)
{
  volatile uint32_t trigger_source = ((ADCx->CFGR1) & ((0x7UL << (6U)) | (0x3UL << (10U))));



  uint32_t shift_exten = ((trigger_source & (0x3UL << (10U))) >> ((10UL) - 2UL));



  return ((trigger_source
           & (((((0x00000000UL) & (0x7UL << (6U))) << (4U * 0UL)) | (((0x7UL << (6U))) << (4U * 1UL)) | (((0x7UL << (6U))) << (4U * 2UL)) | (((0x7UL << (6U))) << (4U * 3UL)) ) >> shift_exten) & (0x7UL << (6U)))
          | ((((((0x00000000UL) & (0x3UL << (10U))) << (4U * 0UL)) | ((((0x1UL << (10U)))) << (4U * 1UL)) | ((((0x1UL << (10U)))) << (4U * 2UL)) | ((((0x1UL << (10U)))) << (4U * 3UL)) ) >> shift_exten) & (0x3UL << (10U)))
         );
}
# 2716 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_IsTriggerSourceSWStart(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CFGR1) & ((0x3UL << (10U)))) == ((0x00000000UL) & (0x3UL << (10U)))) ? 1UL : 0UL);
}
# 2735 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x3UL << (10U))))) | (ExternalTriggerEdge))));
}
# 2750 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetTriggerEdge(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x3UL << (10U)))));
}
# 2787 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerConfigurable(ADC_TypeDef *ADCx, uint32_t Configurability)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (21U))))) | (Configurability))));
}
# 2813 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerConfigurable(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (21U)))));
}
# 2885 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks)
{
  ((ADCx->CHSELR) |= (SequencerNbRanks));
}
# 2944 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerLength(const ADC_TypeDef *ADCx)
{
  volatile uint32_t channels_ranks = ((ADCx->CHSELR) & ((0xFFFFFFFFUL << (0U))));
  uint32_t sequencer_length = (0x00000000UL);
  uint32_t rank_index;
  uint32_t rank_shifted;





  for (rank_index = 0U; rank_index <= (28U - 4U); rank_index += 4U)
  {
    rank_shifted = (uint32_t)(0xF0UL << rank_index);
    if ((channels_ranks & rank_shifted) == rank_shifted)
    {
      sequencer_length = rank_shifted;
      break;
    }
  }

  return sequencer_length;
}
# 2993 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (2U))))) | (ScanDirection))));
}
# 3011 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerScanDirection(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (2U)))));
}
# 3032 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (16U))))) | (SeqDiscont))));
}
# 3047 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerDiscont(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (16U)))));
}
# 3127 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
{




  (((ADCx->CHSELR)) = ((((((ADCx->CHSELR))) & (~((0xFUL << (0U)) << (Rank & ((0x0000001FUL)))))) | (((Channel & ((0xFUL << (0U)) << (26UL))) >> (26UL)) << (Rank & ((0x0000001FUL)))))));



}
# 3208 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerRanks(const ADC_TypeDef *ADCx, uint32_t Rank)
{
  return (uint32_t)((((ADCx->CHSELR) & ((0xFUL << (0U)) << (Rank & ((0x0000001FUL)))))

                     >> (Rank & ((0x0000001FUL)))
                    ) << ((26UL))
                   );
}
# 3302 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
{


  ((ADCx->CHSELR) = ((Channel & ((0x7FFFFUL << (0U))))));
}
# 3394 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
{


  ((ADCx->CHSELR) |= ((Channel & ((0x7FFFFUL << (0U))))));
}
# 3486 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
{


  ((ADCx->CHSELR) &= ~((Channel & ((0x7FFFFUL << (0U))))));
}
# 3567 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetSequencerChannels(const ADC_TypeDef *ADCx)
{
  uint32_t channels_bitfield = (uint32_t)((ADCx->CHSELR) & ((0x7FFFFUL << (0U))));

  return ((((channels_bitfield & (0x1UL << (0U))) >> ( 0UL)) * ((0x00000000UL) | ((0x1UL << (0U))) ))
          | (((channels_bitfield & (0x1UL << (1U))) >> ( 1UL)) * (((0x01UL << (26U))) | ((0x1UL << (1U))) ))
          | (((channels_bitfield & (0x1UL << (2U))) >> ( 2UL)) * (((0x02UL << (26U))) | ((0x1UL << (2U))) ))
          | (((channels_bitfield & (0x1UL << (3U))) >> ( 3UL)) * (((0x02UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (3U))) ))
          | (((channels_bitfield & (0x1UL << (4U))) >> ( 4UL)) * (((0x04UL << (26U))) | ((0x1UL << (4U))) ))
          | (((channels_bitfield & (0x1UL << (5U))) >> ( 5UL)) * (((0x04UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (5U))) ))
          | (((channels_bitfield & (0x1UL << (6U))) >> ( 6UL)) * (((0x04UL << (26U)) | (0x02UL << (26U))) | ((0x1UL << (6U))) ))
          | (((channels_bitfield & (0x1UL << (7U))) >> ( 7UL)) * (((0x04UL << (26U)) | (0x02UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (7U))) ))
          | (((channels_bitfield & (0x1UL << (8U))) >> ( 8UL)) * (((0x08UL << (26U))) | ((0x1UL << (8U))) ))
          | (((channels_bitfield & (0x1UL << (9U))) >> ( 9UL)) * (((0x08UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (9U))) ))
          | (((channels_bitfield & (0x1UL << (10U))) >> (10UL)) * (((0x08UL << (26U)) | (0x02UL << (26U))) | ((0x1UL << (10U)))))
          | (((channels_bitfield & (0x1UL << (11U))) >> (11UL)) * (((0x08UL << (26U)) | (0x02UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (11U)))))
          | (((channels_bitfield & (0x1UL << (12U))) >> (12UL)) * (((0x08UL << (26U)) | (0x04UL << (26U))) | ((0x1UL << (12U)))))
          | (((channels_bitfield & (0x1UL << (13U))) >> (13UL)) * (((0x08UL << (26U)) | (0x04UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (13U)))))
          | (((channels_bitfield & (0x1UL << (14U))) >> (14UL)) * (((0x08UL << (26U)) | (0x04UL << (26U)) | (0x02UL << (26U))) | ((0x1UL << (14U)))))
          | (((channels_bitfield & (0x1UL << (15U))) >> (15UL)) * (((0x08UL << (26U)) | (0x04UL << (26U)) | (0x02UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (15U)))))
          | (((channels_bitfield & (0x1UL << (16U))) >> (16UL)) * (((0x10UL << (26U))) | ((0x1UL << (16U)))))
          | (((channels_bitfield & (0x1UL << (17U))) >> (17UL)) * (((0x10UL << (26U)) | (0x01UL << (26U))) | ((0x1UL << (17U)))))

          | (((channels_bitfield & (0x1UL << (18U))) >> (18UL)) * (((0x10UL << (26U)) | (0x02UL << (26U))) | ((0x1UL << (18U)))))

         );
}
# 3613 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (13U))))) | (Continuous))));
}
# 3630 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetContinuousMode(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (13U)))));
}
# 3667 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (0U)) | (0x1UL << (1U))))) | (DMATransfer))));
}
# 3700 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetDMATransfer(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (0U)) | (0x1UL << (1U)))));
}
# 3724 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
{
  (((ADCx->CFGR1)) = ((((((ADCx->CFGR1))) & (~((0x1UL << (12U))))) | (Overrun))));
}
# 3738 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_GetOverrun(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR1) & ((0x1UL << (12U)))));
}
# 3826 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTimeY)
{


  (((ADCx->SMPR)) = ((((((ADCx->SMPR))) & (~((Channel << ( 8UL))))) | ((Channel << ( 8UL)) & (SamplingTimeY & (((0x7FFFFUL << (0U))) << ( 8UL)))))));



}
# 3895 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetChannelSamplingTime(const ADC_TypeDef *ADCx, uint32_t Channel)
{
  volatile uint32_t smpr = ((ADCx->SMPR));



  uint32_t smp_channel_posbit0 = ((smpr & (((0x7FFFFUL << (0U))) << ( 8UL)))
                                  >> ((((Channel & ((0x1FUL << (26U)))) >> (26UL))
                                       + ( 8UL))
                                      & 0x1FUL));


  return ((~(smp_channel_posbit0) * (( 0UL)))
          | (smp_channel_posbit0 * (( 4UL) | (((0x7FFFFUL << (0U))) << ( 8UL)))));
}
# 3988 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDChannelGroup)
{




  volatile uint32_t *preg;

  if (AWDy == (((0x1FUL << (26U)) | (0x1UL << (23U)) | (0x1UL << (22U))) | (0x00000000UL)))
  {
    preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->CFGR1)) + ((0UL) << 2UL))));
  }
  else
  {
    preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->AWD2CR)) + ((((AWDy & ((0x00000000UL) | (0x00100000UL) | (0x00200000UL)))) >> ((20UL) + 1UL)) << 2UL))));

  }

  (((*preg)) = ((((((*preg))) & (~((AWDy & (((0x1FUL << (26U)) | (0x1UL << (23U)) | (0x1UL << (22U))) | ((0x7FFFFUL << (0U)))))))) | (AWDChannelGroup & AWDy))));


}
# 4089 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetAnalogWDMonitChannels(const ADC_TypeDef *ADCx, uint32_t AWDy)
{
  volatile const uint32_t *preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->CFGR1)) + ((((AWDy & ((0x00000000UL) | (0x00100000UL) | (0x00200000UL))) >> (20UL)) + ((AWDy & ((0x00001UL << (0U)))) * (0x00000024UL))) << 2UL))));




  uint32_t analog_wd_monit_channels = (((*preg) & (AWDy)) & AWDy & (((0x1FUL << (26U)) | (0x1UL << (23U)) | (0x1UL << (22U))) | ((0x7FFFFUL << (0U)))));





  if (analog_wd_monit_channels != 0UL)
  {
    if (AWDy == (((0x1FUL << (26U)) | (0x1UL << (23U)) | (0x1UL << (22U))) | (0x00000000UL)))
    {
      if ((analog_wd_monit_channels & (0x1UL << (22U))) == 0UL)
      {

        analog_wd_monit_channels = ((analog_wd_monit_channels
                                     | (((0x7FFFFUL << (0U))))
                                    )
                                    & (~((0x1FUL << (26U))))
                                   );
      }
      else
      {

        analog_wd_monit_channels = (analog_wd_monit_channels
                                    | ((0x00001UL << (0U)) << (analog_wd_monit_channels >> (26U)))
                                   );
      }
    }
    else
    {
      if ((analog_wd_monit_channels & ((0x7FFFFUL << (0U)))) == ((0x7FFFFUL << (0U))))
      {

        analog_wd_monit_channels = (((0x7FFFFUL << (0U)))
                                    | ((0x1UL << (23U)))
                                   );
      }
      else
      {


        analog_wd_monit_channels = (analog_wd_monit_channels
                                    | ((0x1UL << (23U)) | (0x1UL << (22U)))
                                    | (((((analog_wd_monit_channels) & ((0x7FFFFUL << (0U)))) == 0UL) ? ( ((analog_wd_monit_channels) & ((0x1FUL << (26U)))) >> (26UL) ) : ((((analog_wd_monit_channels) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? (0UL) : ((((analog_wd_monit_channels) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? (1UL) : ((((analog_wd_monit_channels) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? (2UL) : ((((analog_wd_monit_channels) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? (3UL) : ((((analog_wd_monit_channels) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? (4UL) : ((((analog_wd_monit_channels) & ((0x1UL << (5U)))) == ((0x1UL << (5U)))) ? (5UL) : ((((analog_wd_monit_channels) & ((0x1UL << (6U)))) == ((0x1UL << (6U)))) ? (6UL) : ((((analog_wd_monit_channels) & ((0x1UL << (7U)))) == ((0x1UL << (7U)))) ? (7UL) : ((((analog_wd_monit_channels) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? (8UL) : ((((analog_wd_monit_channels) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? (9UL) : ((((analog_wd_monit_channels) & ((0x1UL << (10U)))) == ((0x1UL << (10U)))) ? (10UL) : ((((analog_wd_monit_channels) & ((0x1UL << (11U)))) == ((0x1UL << (11U)))) ? (11UL) : ((((analog_wd_monit_channels) & ((0x1UL << (12U)))) == ((0x1UL << (12U)))) ? (12UL) : ((((analog_wd_monit_channels) & ((0x1UL << (13U)))) == ((0x1UL << (13U)))) ? (13UL) : ((((analog_wd_monit_channels) & ((0x1UL << (14U)))) == ((0x1UL << (14U)))) ? (14UL) : ((((analog_wd_monit_channels) & ((0x1UL << (15U)))) == ((0x1UL << (15U)))) ? (15UL) : ((((analog_wd_monit_channels) & ((0x1UL << (16U)))) == ((0x1UL << (16U)))) ? (16UL) : ((((analog_wd_monit_channels) & ((0x1UL << (17U)))) == ((0x1UL << (17U)))) ? (17UL) : ((((analog_wd_monit_channels) & ((0x1UL << (18U)))) == ((0x1UL << (18U)))) ? (18UL) : (0UL))))))))))))))))))))) << (26U))
                                   );
      }
    }
  }

  return analog_wd_monit_channels;
}
# 4208 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdHighValue,
                                                     uint32_t AWDThresholdLowValue)
{





  volatile uint32_t *preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->AWD1TR)) + (((((AWDy & (((0x00000000UL)) | ((0x00100000UL)) | ((0x00200000UL) + (1UL << (20UL)))))) >> ((20UL))) + (((0x00200000UL) & AWDy) >> ((20UL) + 1UL))) << 2UL))));






  (((*preg)) = ((((((*preg))) & (~((0xFFFUL << (16U)) | (0xFFFUL << (0U))))) | ((AWDThresholdHighValue << (16UL)) | AWDThresholdLowValue))));


}
# 4291 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThresholdsHighLow,
                                                  uint32_t AWDThresholdValue)
{





  volatile uint32_t *preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->AWD1TR)) + (((((AWDy & (((0x00000000UL)) | ((0x00100000UL)) | ((0x00200000UL) + (1UL << (20UL)))))) >> ((20UL))) + (((0x00200000UL) & AWDy) >> ((20UL) + 1UL))) << 2UL))));





  (((*preg)) = ((((((*preg))) & (~(AWDThresholdsHighLow))) | (AWDThresholdValue << ((AWDThresholdsHighLow & (0x00010000UL)) >> ((16UL) - 4UL))))));


}
# 4338 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetAnalogWDThresholds(const ADC_TypeDef *ADCx,
                                                      uint32_t AWDy, uint32_t AWDThresholdsHighLow)
{





  const volatile uint32_t *preg = ((volatile uint32_t *)((uint32_t) ((uint32_t)(&(ADCx->AWD1TR)) + (((((AWDy & (((0x00000000UL)) | ((0x00100000UL)) | ((0x00200000UL) + (1UL << (20UL)))))) >> ((20UL))) + (((0x00200000UL) & AWDy) >> ((20UL) + 1UL))) << 2UL))));





  return (uint32_t)(((*preg) & ((AWDThresholdsHighLow | (0xFFFUL << (0U)))))

                    >> (((AWDThresholdsHighLow & (0x00010000UL)) >> ((16UL) - 4UL))
                        & ~(AWDThresholdsHighLow & (0xFFFUL << (0U)))));
}
# 4378 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
{
  (((ADCx->CFGR2)) = ((((((ADCx->CFGR2))) & (~((0x1UL << (0U))))) | (OvsScope))));
}
# 4391 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetOverSamplingScope(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0x1UL << (0U)))));
}
# 4414 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
{
  (((ADCx->CFGR2)) = ((((((ADCx->CFGR2))) & (~((0x1UL << (9U))))) | (OverSamplingDiscont))));
}
# 4433 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetOverSamplingDiscont(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0x1UL << (9U)))));
}
# 4470 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
{
  (((ADCx->CFGR2)) = ((((((ADCx->CFGR2))) & (~(((0xFUL << (5U)) | (0x7UL << (2U)))))) | ((Shift | Ratio)))));
}
# 4489 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetOverSamplingRatio(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0x7UL << (2U)))));
}
# 4509 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_GetOverSamplingShift(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->CFGR2) & ((0xFUL << (5U)))));
}
# 4544 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (28U))))));


}
# 4563 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
{
  ((ADCx->CR) &= ~(((0x1UL << (28U)) | ((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U))))));
}







static inline uint32_t LL_ADC_IsInternalRegulatorEnabled(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (28U)))) == ((0x1UL << (28U)))) ? 1UL : 0UL);
}
# 4595 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_Enable(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (0U))))));


}
# 4615 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_Disable(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (1U))))));


}
# 4634 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabled(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsDisableOngoing(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}
# 4678 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (31U))))));


}







static inline uint32_t LL_ADC_IsCalibrationOnGoing(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (31U)))) == ((0x1UL << (31U)))) ? 1UL : 0UL);
}
# 4725 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (2U))))));


}
# 4745 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
{



  (((ADCx->CR)) = ((((((ADCx->CR))) & (~(((0x1UL << (31U)) | (0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (2U)) | (0x1UL << (4U)))))) | ((0x1UL << (4U))))));


}







static inline uint32_t LL_ADC_REG_IsConversionOngoing(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_REG_IsStopConversionOngoing(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->CR) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}
# 4786 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_REG_ReadConversionData32(const ADC_TypeDef *ADCx)
{
  return (uint32_t)(((ADCx->DR) & ((0xFFFFUL << (0U)))));
}
# 4801 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint16_t LL_ADC_REG_ReadConversionData12(const ADC_TypeDef *ADCx)
{
  return (uint16_t)(((ADCx->DR) & ((0xFFFFUL << (0U)))) & 0x00000FFFUL);
}
# 4816 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint16_t LL_ADC_REG_ReadConversionData10(const ADC_TypeDef *ADCx)
{
  return (uint16_t)(((ADCx->DR) & ((0xFFFFUL << (0U)))) & 0x000003FFUL);
}
# 4831 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint8_t LL_ADC_REG_ReadConversionData8(const ADC_TypeDef *ADCx)
{
  return (uint8_t)(((ADCx->DR) & ((0xFFFFUL << (0U)))) & 0x000000FFUL);
}
# 4846 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint8_t LL_ADC_REG_ReadConversionData6(const ADC_TypeDef *ADCx)
{
  return (uint8_t)(((ADCx->DR) & ((0xFFFFUL << (0U)))) & 0x0000003FUL);
}
# 4868 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsActiveFlag_ADRDY(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}
# 4895 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsActiveFlag_CCRDY(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (13U)))) == ((0x1UL << (13U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_EOC(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_EOS(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_OVR(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_EOSMP(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_AWD1(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (7U)))) == ((0x1UL << (7U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_AWD2(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_AWD3(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsActiveFlag_EOCAL(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->ISR) & ((0x1UL << (11U)))) == ((0x1UL << (11U)))) ? 1UL : 0UL);
}
# 4997 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (0U))));
}







static inline void LL_ADC_ClearFlag_CCRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (13U))));
}







static inline void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (2U))));
}







static inline void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (3U))));
}







static inline void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (4U))));
}







static inline void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (1U))));
}







static inline void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (7U))));
}







static inline void LL_ADC_ClearFlag_AWD2(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (8U))));
}







static inline void LL_ADC_ClearFlag_AWD3(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (9U))));
}







static inline void LL_ADC_ClearFlag_EOCAL(ADC_TypeDef *ADCx)
{
  ((ADCx->ISR) = ((0x1UL << (11U))));
}
# 5115 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (0U))));
}







static inline void LL_ADC_EnableIT_CCRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (13U))));
}







static inline void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (2U))));
}







static inline void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (3U))));
}







static inline void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (4U))));
}







static inline void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (1U))));
}







static inline void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (7U))));
}







static inline void LL_ADC_EnableIT_AWD2(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (8U))));
}







static inline void LL_ADC_EnableIT_AWD3(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (9U))));
}







static inline void LL_ADC_EnableIT_EOCAL(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) |= ((0x1UL << (11U))));
}







static inline void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (0U))));
}







static inline void LL_ADC_DisableIT_CCRDY(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (13U))));
}







static inline void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (2U))));
}







static inline void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (3U))));
}







static inline void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (4U))));
}







static inline void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (1U))));
}







static inline void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (7U))));
}







static inline void LL_ADC_DisableIT_AWD2(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (8U))));
}







static inline void LL_ADC_DisableIT_AWD3(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (9U))));
}







static inline void LL_ADC_DisableIT_EOCAL(ADC_TypeDef *ADCx)
{
  ((ADCx->IER) &= ~((0x1UL << (11U))));
}
# 5336 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_ADRDY(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (0U)))) == ((0x1UL << (0U)))) ? 1UL : 0UL);
}







static inline uint32_t LL_ADC_IsEnabledIT_CCRDY(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (13U)))) == ((0x1UL << (13U)))) ? 1UL : 0UL);
}
# 5359 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_EOC(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (2U)))) == ((0x1UL << (2U)))) ? 1UL : 0UL);
}
# 5371 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_EOS(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (3U)))) == ((0x1UL << (3U)))) ? 1UL : 0UL);
}
# 5383 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_OVR(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (4U)))) == ((0x1UL << (4U)))) ? 1UL : 0UL);
}
# 5395 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_EOSMP(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (1U)))) == ((0x1UL << (1U)))) ? 1UL : 0UL);
}
# 5407 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_AWD1(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (7U)))) == ((0x1UL << (7U)))) ? 1UL : 0UL);
}
# 5419 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_AWD2(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (8U)))) == ((0x1UL << (8U)))) ? 1UL : 0UL);
}
# 5431 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_AWD3(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (9U)))) == ((0x1UL << (9U)))) ? 1UL : 0UL);
}
# 5443 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_ll_adc.h"
static inline uint32_t LL_ADC_IsEnabledIT_EOCAL(const ADC_TypeDef *ADCx)
{
  return ((((ADCx->IER) & ((0x1UL << (11U)))) == ((0x1UL << (11U)))) ? 1UL : 0UL);
}
# 32 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h" 2
# 49 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
typedef struct
{
  uint32_t Ratio;


  uint32_t RightBitShift;


  uint32_t TriggeredMode;


} ADC_OversamplingTypeDef;
# 79 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
typedef struct
{
  uint32_t ClockPrescaler;
# 94 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t Resolution;


  uint32_t DataAlign;



  uint32_t ScanConvMode;
# 127 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t EOCSelection;



  FunctionalState LowPowerAutoWait;
# 150 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  FunctionalState LowPowerAutoPowerOff;






  FunctionalState ContinuousConvMode;




  uint32_t NbrOfConversion;
# 180 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  FunctionalState DiscontinuousConvMode;
# 191 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t ExternalTrigConv;






  uint32_t ExternalTrigConvEdge;



  FunctionalState DMAContinuousRequests;







  uint32_t Overrun;
# 225 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t SamplingTimeCommon1;
# 243 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t SamplingTimeCommon2;
# 261 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  FunctionalState OversamplingMode;




  ADC_OversamplingTypeDef Oversampling;



  uint32_t TriggerFrequencyMode;
# 281 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
} ADC_InitTypeDef;
# 292 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
typedef struct
{
  uint32_t Channel;





  uint32_t Rank;
# 313 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t SamplingTime;
# 331 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
} ADC_ChannelConfTypeDef;
# 341 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
typedef struct
{
  uint32_t WatchdogNumber;






  uint32_t WatchdogMode;






  uint32_t Channel;
# 367 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  FunctionalState ITMode;


  uint32_t HighThreshold;
# 382 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
  uint32_t LowThreshold;
# 393 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
} ADC_AnalogWDGConfTypeDef;
# 460 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
typedef struct

{
  ADC_TypeDef *Instance;
  ADC_InitTypeDef Init;
  DMA_HandleTypeDef *DMA_Handle;
  HAL_LockTypeDef Lock;
  volatile uint32_t State;
  volatile uint32_t ErrorCode;

  uint32_t ADCGroupRegularSequencerRanks;
# 485 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
} ADC_HandleTypeDef;
# 1833 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc_ex.h" 1
# 146 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc_ex.h"
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc);
uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t CalibrationFactor);


void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc);
void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc);
void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc);
void HAL_ADCEx_ChannelConfigReadyCallback(ADC_HandleTypeDef *hadc);
# 164 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc_ex.h"
HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc);
# 1834 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h" 2
# 1845 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc);
void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc);
# 1867 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout);
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout);


HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc);


HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc);


uint32_t HAL_ADC_GetValue(const ADC_HandleTypeDef *hadc);


void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc);
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc);
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc);
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc);
void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
# 1898 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, const ADC_ChannelConfTypeDef *pConfig);
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc,
                                                const ADC_AnalogWDGConfTypeDef *pAnalogWDGConfig);
# 1910 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
uint32_t HAL_ADC_GetState(const ADC_HandleTypeDef *hadc);
uint32_t HAL_ADC_GetError(const ADC_HandleTypeDef *hadc);
# 1922 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_adc.h"
HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc);
HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc);
# 212 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2
# 224 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h"
typedef enum
{
  HAL_CRC_STATE_RESET = 0x00U,
  HAL_CRC_STATE_READY = 0x01U,
  HAL_CRC_STATE_BUSY = 0x02U,
  HAL_CRC_STATE_TIMEOUT = 0x03U,
  HAL_CRC_STATE_ERROR = 0x04U
} HAL_CRC_StateTypeDef;




typedef struct
{
  uint8_t DefaultPolynomialUse;





  uint8_t DefaultInitValueUse;




  uint32_t GeneratingPolynomial;




  uint32_t CRCLength;






  uint32_t InitValue;


  uint32_t InputDataInversionMode;






  uint32_t OutputDataInversionMode;



} CRC_InitTypeDef;




typedef struct
{
  CRC_TypeDef *Instance;

  CRC_InitTypeDef Init;

  HAL_LockTypeDef Lock;

  volatile HAL_CRC_StateTypeDef State;

  uint32_t InputDataFormat;







} CRC_HandleTypeDef;
# 288 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc_ex.h" 1
# 127 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc_ex.h"
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
# 289 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h" 2
# 299 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h"
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
# 311 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h"
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
# 321 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_crc.h"
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
# 225 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2
# 236 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_exti.h" 1
# 44 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_exti.h"
typedef enum
{
  HAL_EXTI_COMMON_CB_ID = 0x00U,
  HAL_EXTI_RISING_CB_ID = 0x01U,
  HAL_EXTI_FALLING_CB_ID = 0x02U,
} EXTI_CallbackIDTypeDef;





typedef struct
{
  uint32_t Line;
  void (* RisingCallback)(void);
  void (* FallingCallback)(void);
} EXTI_HandleTypeDef;




typedef struct
{
  uint32_t Line;

  uint32_t Mode;

  uint32_t Trigger;

  uint32_t GPIOSel;


} EXTI_ConfigTypeDef;
# 347 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_exti.h"
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
# 361 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_exti.h"
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
# 237 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h" 1
# 45 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
typedef struct
{
  uint32_t TypeErase;

  uint32_t Banks;


  uint32_t Page;

  uint32_t NbPages;

} FLASH_EraseInitTypeDef;




typedef struct
{
  uint32_t OptionType;

  uint32_t WRPArea;


  uint32_t WRPStartOffset;

  uint32_t WRPEndOffset;

  uint32_t RDPLevel;

  uint32_t USERType;

  uint32_t USERConfig;
# 131 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
} FLASH_OBProgramInitTypeDef;




typedef struct
{
  HAL_LockTypeDef Lock;
  uint32_t ErrorCode;
  uint32_t ProcedureOnGoing;
  uint32_t Address;
  uint32_t Banks;
  uint32_t Page;
  uint32_t NbPagesToErase;
} FLASH_ProcessTypeDef;
# 804 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash_ex.h" 1
# 64 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash_ex.h"
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
void HAL_FLASHEx_EnableDebugger(void);
void HAL_FLASHEx_DisableDebugger(void);
uint32_t HAL_FLASHEx_FlashEmptyCheck(void);
void HAL_FLASHEx_ForceFlashEmpty(uint32_t FlashEmpty);



HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
# 98 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash_ex.h"
void FLASH_PageErase(uint32_t Banks, uint32_t Page);
# 805 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h" 2




extern FLASH_ProcessTypeDef pFlash;
# 823 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);

void HAL_FLASH_IRQHandler(void);

void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
# 838 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
HAL_StatusTypeDef HAL_FLASH_Unlock(void);
HAL_StatusTypeDef HAL_FLASH_Lock(void);

HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
# 852 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
uint32_t HAL_FLASH_GetError(void);
# 865 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_flash.h"
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
# 241 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2
# 264 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr.h" 1
# 267 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr_ex.h" 1
# 563 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr_ex.h"
void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection);
void HAL_PWREx_DisableBatteryCharging(void);




void HAL_PWREx_EnableInternalWakeUpLine(void);
void HAL_PWREx_DisableInternalWakeUpLine(void);
HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
void HAL_PWREx_EnablePullUpPullDownConfig(void);
void HAL_PWREx_DisablePullUpPullDownConfig(void);




void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode);
void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode);
uint32_t HAL_PWREx_GetVoltageRange(void);
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
# 604 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr_ex.h"
void HAL_PWREx_EnableLowPowerRunMode(void);
HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
# 268 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr.h" 2
# 279 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr.h"
void HAL_PWR_DeInit(void);
# 288 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_pwr.h"
void HAL_PWR_EnableBkUpAccess(void);
void HAL_PWR_DisableBkUpAccess(void);


void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);


void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
void HAL_PWR_EnterSTANDBYMode(void);
void HAL_PWR_EnableSleepOnExit(void);
void HAL_PWR_DisableSleepOnExit(void);
void HAL_PWR_EnableSEVOnPend(void);
void HAL_PWR_DisableSEVOnPend(void);
# 265 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2







# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
typedef enum
{
  HAL_RTC_STATE_RESET = 0x00U,
  HAL_RTC_STATE_READY = 0x01U,
  HAL_RTC_STATE_BUSY = 0x02U,
  HAL_RTC_STATE_TIMEOUT = 0x03U,
  HAL_RTC_STATE_ERROR = 0x04U

}HAL_RTCStateTypeDef;




typedef struct
{
  uint32_t HourFormat;


  uint32_t AsynchPrediv;


  uint32_t SynchPrediv;


  uint32_t OutPut;


  uint32_t OutPutRemap;


  uint32_t OutPutPolarity;


  uint32_t OutPutType;


  uint32_t OutPutPullUp;

}RTC_InitTypeDef;




typedef struct
{
  uint8_t Hours;



  uint8_t Minutes;


  uint8_t Seconds;


  uint8_t TimeFormat;


  uint32_t SubSeconds;



  uint32_t SecondFraction;





  uint32_t DayLightSaving;


  uint32_t StoreOperation;


}RTC_TimeTypeDef;




typedef struct
{
  uint8_t WeekDay;


  uint8_t Month;


  uint8_t Date;


  uint8_t Year;


}RTC_DateTypeDef;




typedef struct
{
  RTC_TimeTypeDef AlarmTime;

  uint32_t AlarmMask;


  uint32_t AlarmSubSecondMask;


  uint32_t AlarmDateWeekDaySel;


  uint8_t AlarmDateWeekDay;



  uint32_t Alarm;

}RTC_AlarmTypeDef;







typedef struct

{
  RTC_TypeDef *Instance;

  uint32_t TampOffset;

  RTC_InitTypeDef Init;

  HAL_LockTypeDef Lock;

  volatile HAL_RTCStateTypeDef State;
# 214 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
}RTC_HandleTypeDef;
# 721 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
typedef struct
{
  uint32_t Tamper;


  uint32_t Trigger;


  uint32_t NoErase;


  uint32_t MaskFlag;


  uint32_t Filter;


  uint32_t SamplingFrequency;


  uint32_t PrechargeDuration;


  uint32_t TamperPullUp;


  uint32_t TimeStampOnTamperDetection;

}RTC_TamperTypeDef;
# 84 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
typedef struct
{
  uint32_t IntTamper;


  uint32_t TimeStampOnTamperDetection;

} RTC_InternalTamperTypeDef;
# 890 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);

void HAL_RTCEx_TimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
# 910 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
# 926 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS);
HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput);
HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
# 943 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc_ex.h"
void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);







HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
HAL_StatusTypeDef HAL_RTCEx_PollForTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t Tamper, uint32_t Timeout);
HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef* sIntTamper);
HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper_IT(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef* sIntTamper);
HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTamper(RTC_HandleTypeDef *hrtc, uint32_t IntTamper);
HAL_StatusTypeDef HAL_RTCEx_PollForInternalTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t IntTamper, uint32_t Timeout);
void HAL_RTCEx_TamperIRQHandler(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_InternalTamper3EventCallback(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_InternalTamper4EventCallback(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_InternalTamper5EventCallback(RTC_HandleTypeDef *hrtc);
void HAL_RTCEx_InternalTamper6EventCallback(RTC_HandleTypeDef *hrtc);







void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
# 722 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h" 2
# 732 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);

void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
# 752 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
# 764 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
# 779 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc);
# 788 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
# 938 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_rtc.h"
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc);
HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc);
uint8_t RTC_ByteToBcd2(uint8_t Value);
uint8_t RTC_Bcd2ToByte(uint8_t Value);
# 273 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2
# 284 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h" 1
# 46 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
typedef struct
{
  uint32_t Mode;


  uint32_t Direction;


  uint32_t DataSize;


  uint32_t CLKPolarity;


  uint32_t CLKPhase;


  uint32_t NSS;



  uint32_t BaudRatePrescaler;





  uint32_t FirstBit;


  uint32_t TIMode;


  uint32_t CRCCalculation;


  uint32_t CRCPolynomial;


  uint32_t CRCLength;



  uint32_t NSSPMode;





} SPI_InitTypeDef;




typedef enum
{
  HAL_SPI_STATE_RESET = 0x00U,
  HAL_SPI_STATE_READY = 0x01U,
  HAL_SPI_STATE_BUSY = 0x02U,
  HAL_SPI_STATE_BUSY_TX = 0x03U,
  HAL_SPI_STATE_BUSY_RX = 0x04U,
  HAL_SPI_STATE_BUSY_TX_RX = 0x05U,
  HAL_SPI_STATE_ERROR = 0x06U,
  HAL_SPI_STATE_ABORT = 0x07U
} HAL_SPI_StateTypeDef;




typedef struct __SPI_HandleTypeDef
{
  SPI_TypeDef *Instance;

  SPI_InitTypeDef Init;

  uint8_t *pTxBuffPtr;

  uint16_t TxXferSize;

  volatile uint16_t TxXferCount;

  uint8_t *pRxBuffPtr;

  uint16_t RxXferSize;

  volatile uint16_t RxXferCount;

  uint32_t CRCSize;

  void (*RxISR)(struct __SPI_HandleTypeDef *hspi);

  void (*TxISR)(struct __SPI_HandleTypeDef *hspi);

  DMA_HandleTypeDef *hdmatx;

  DMA_HandleTypeDef *hdmarx;

  HAL_LockTypeDef Lock;

  volatile HAL_SPI_StateTypeDef State;

  volatile uint32_t ErrorCode;
# 162 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
} SPI_HandleTypeDef;
# 762 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi_ex.h" 1
# 51 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi_ex.h"
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
# 763 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h" 2
# 773 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
# 792 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
                                          uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
                                             uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
                                              uint16_t Size);
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);

HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);

void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
# 828 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_spi.h"
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
# 285 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h" 1
# 46 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
typedef struct
{
  uint32_t Prescaler;


  uint32_t CounterMode;


  uint32_t Period;



  uint32_t ClockDivision;


  uint32_t RepetitionCounter;
# 72 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
  uint32_t AutoReloadPreload;

} TIM_Base_InitTypeDef;




typedef struct
{
  uint32_t OCMode;


  uint32_t Pulse;


  uint32_t OCPolarity;


  uint32_t OCNPolarity;



  uint32_t OCFastMode;




  uint32_t OCIdleState;



  uint32_t OCNIdleState;


} TIM_OC_InitTypeDef;




typedef struct
{
  uint32_t OCMode;


  uint32_t Pulse;


  uint32_t OCPolarity;


  uint32_t OCNPolarity;



  uint32_t OCIdleState;



  uint32_t OCNIdleState;



  uint32_t ICPolarity;


  uint32_t ICSelection;


  uint32_t ICFilter;

} TIM_OnePulse_InitTypeDef;




typedef struct
{
  uint32_t ICPolarity;


  uint32_t ICSelection;


  uint32_t ICPrescaler;


  uint32_t ICFilter;

} TIM_IC_InitTypeDef;




typedef struct
{
  uint32_t EncoderMode;


  uint32_t IC1Polarity;


  uint32_t IC1Selection;


  uint32_t IC1Prescaler;


  uint32_t IC1Filter;


  uint32_t IC2Polarity;


  uint32_t IC2Selection;


  uint32_t IC2Prescaler;


  uint32_t IC2Filter;

} TIM_Encoder_InitTypeDef;




typedef struct
{
  uint32_t ClockSource;

  uint32_t ClockPolarity;

  uint32_t ClockPrescaler;

  uint32_t ClockFilter;

} TIM_ClockConfigTypeDef;




typedef struct
{
  uint32_t ClearInputState;

  uint32_t ClearInputSource;

  uint32_t ClearInputPolarity;

  uint32_t ClearInputPrescaler;


  uint32_t ClearInputFilter;

} TIM_ClearInputConfigTypeDef;






typedef struct
{
  uint32_t MasterOutputTrigger;

  uint32_t MasterOutputTrigger2;

  uint32_t MasterSlaveMode;






} TIM_MasterConfigTypeDef;




typedef struct
{
  uint32_t SlaveMode;

  uint32_t InputTrigger;

  uint32_t TriggerPolarity;

  uint32_t TriggerPrescaler;

  uint32_t TriggerFilter;


} TIM_SlaveConfigTypeDef;






typedef struct
{
  uint32_t OffStateRunMode;

  uint32_t OffStateIDLEMode;

  uint32_t LockLevel;

  uint32_t DeadTime;

  uint32_t BreakState;

  uint32_t BreakPolarity;

  uint32_t BreakFilter;

  uint32_t BreakAFMode;

  uint32_t Break2State;

  uint32_t Break2Polarity;

  uint32_t Break2Filter;

  uint32_t Break2AFMode;

  uint32_t AutomaticOutput;

} TIM_BreakDeadTimeConfigTypeDef;




typedef enum
{
  HAL_TIM_STATE_RESET = 0x00U,
  HAL_TIM_STATE_READY = 0x01U,
  HAL_TIM_STATE_BUSY = 0x02U,
  HAL_TIM_STATE_TIMEOUT = 0x03U,
  HAL_TIM_STATE_ERROR = 0x04U
} HAL_TIM_StateTypeDef;




typedef enum
{
  HAL_TIM_CHANNEL_STATE_RESET = 0x00U,
  HAL_TIM_CHANNEL_STATE_READY = 0x01U,
  HAL_TIM_CHANNEL_STATE_BUSY = 0x02U,
} HAL_TIM_ChannelStateTypeDef;




typedef enum
{
  HAL_DMA_BURST_STATE_RESET = 0x00U,
  HAL_DMA_BURST_STATE_READY = 0x01U,
  HAL_DMA_BURST_STATE_BUSY = 0x02U,
} HAL_TIM_DMABurstStateTypeDef;




typedef enum
{
  HAL_TIM_ACTIVE_CHANNEL_1 = 0x01U,
  HAL_TIM_ACTIVE_CHANNEL_2 = 0x02U,
  HAL_TIM_ACTIVE_CHANNEL_3 = 0x04U,
  HAL_TIM_ACTIVE_CHANNEL_4 = 0x08U,
  HAL_TIM_ACTIVE_CHANNEL_5 = 0x10U,
  HAL_TIM_ACTIVE_CHANNEL_6 = 0x20U,
  HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00U
} HAL_TIM_ActiveChannel;







typedef struct

{
  TIM_TypeDef *Instance;
  TIM_Base_InitTypeDef Init;
  HAL_TIM_ActiveChannel Channel;
  DMA_HandleTypeDef *hdma[7];

  HAL_LockTypeDef Lock;
  volatile HAL_TIM_StateTypeDef State;
  volatile HAL_TIM_ChannelStateTypeDef ChannelState[6];
  volatile HAL_TIM_ChannelStateTypeDef ChannelNState[4];
  volatile HAL_TIM_DMABurstStateTypeDef DMABurstState;
# 397 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
} TIM_HandleTypeDef;
# 2192 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
typedef struct
{
  uint32_t IC1Polarity;


  uint32_t IC1Prescaler;


  uint32_t IC1Filter;


  uint32_t Commutation_Delay;

} TIM_HallSensor_InitTypeDef;




typedef struct
{
  uint32_t Source;

  uint32_t Enable;

  uint32_t Polarity;

} TIMEx_BreakInputConfigTypeDef;
# 338 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);

void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);


HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
# 363 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);


HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);


HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
                                          uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 384 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);


HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
                                           uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 404 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);


HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
# 419 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
                                              uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
                                                 uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
                                                  uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
                                                        const TIM_MasterConfigTypeDef *sMasterConfig);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
                                                const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
                                             const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);

HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput);
# 446 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
# 459 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN);
# 474 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim_ex.h"
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
# 2193 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h" 2
# 2204 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
# 2226 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
                                       uint16_t Length);
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 2249 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
                                        uint16_t Length);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 2272 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 2294 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);

HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
# 2313 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);

HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);

HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1,
                                            uint32_t *pData2, uint16_t Length);
HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
# 2336 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
# 2346 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
                                           uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
                                            uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig,
                                           uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
                                                 uint32_t OutputChannel, uint32_t InputChannel);
HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
                                           const TIM_ClearInputConfigTypeDef *sClearInputConfig,
                                           uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig);
HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
                                              uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
                                              uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
                                                   uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
                                                   uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
                                             uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
                                                  uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
                                                  uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel);
# 2385 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim);
void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
# 2412 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim);
HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim);


HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim);
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim);
# 2436 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_tim.h"
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure);
void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);

void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma);
void TIM_DMAError(DMA_HandleTypeDef *hdma);
void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma);
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState);
# 289 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2



# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
typedef struct
{
  uint32_t BaudRate;
# 65 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
  uint32_t WordLength;


  uint32_t StopBits;


  uint32_t Parity;






  uint32_t Mode;


  uint32_t HwFlowCtl;



  uint32_t OverSampling;


  uint32_t OneBitSampling;



  uint32_t ClockPrescaler;


} UART_InitTypeDef;




typedef struct
{
  uint32_t AdvFeatureInit;



  uint32_t TxPinLevelInvert;


  uint32_t RxPinLevelInvert;


  uint32_t DataInvert;



  uint32_t Swap;


  uint32_t OverrunDisable;


  uint32_t DMADisableonRxError;


  uint32_t AutoBaudRateEnable;


  uint32_t AutoBaudRateMode;



  uint32_t MSBFirst;

} UART_AdvFeatureInitTypeDef;
# 177 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
typedef uint32_t HAL_UART_StateTypeDef;




typedef enum
{
  UART_CLOCKSOURCE_PCLK1 = 0x00U,
  UART_CLOCKSOURCE_HSI = 0x02U,
  UART_CLOCKSOURCE_SYSCLK = 0x04U,
  UART_CLOCKSOURCE_LSE = 0x08U,
  UART_CLOCKSOURCE_UNDEFINED = 0x10U
} UART_ClockSourceTypeDef;




typedef struct __UART_HandleTypeDef
{
  USART_TypeDef *Instance;

  UART_InitTypeDef Init;

  UART_AdvFeatureInitTypeDef AdvancedInit;

  uint8_t *pTxBuffPtr;

  uint16_t TxXferSize;

  volatile uint16_t TxXferCount;

  uint8_t *pRxBuffPtr;

  uint16_t RxXferSize;

  volatile uint16_t RxXferCount;

  uint16_t Mask;

  uint32_t FifoMode;


  uint16_t NbRxDataToProcess;

  uint16_t NbTxDataToProcess;

  void (*RxISR)(struct __UART_HandleTypeDef *huart);

  void (*TxISR)(struct __UART_HandleTypeDef *huart);

  DMA_HandleTypeDef *hdmatx;

  DMA_HandleTypeDef *hdmarx;

  HAL_LockTypeDef Lock;

  volatile HAL_UART_StateTypeDef gState;



  volatile HAL_UART_StateTypeDef RxState;


  volatile uint32_t ErrorCode;
# 259 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
} UART_HandleTypeDef;
# 1489 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart_ex.h" 1
# 47 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart_ex.h"
typedef struct
{
  uint32_t WakeUpEvent;




  uint16_t AddressLength;


  uint8_t Address;
} UART_WakeUpTypeDef;
# 141 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart_ex.h"
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
# 151 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart_ex.h"
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);

void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
# 165 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart_ex.h"
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
# 1490 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h" 2
# 1502 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
# 1525 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);

HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);

void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
# 1561 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
# 1577 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
# 1595 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal_uart.h"
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
# 293 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\stm32g0xx_hal_conf.h" 2
# 30 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h" 2
# 43 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
typedef enum
{
  HAL_TICK_FREQ_10HZ = 100U,
  HAL_TICK_FREQ_100HZ = 10U,
  HAL_TICK_FREQ_1KHZ = 1U,
  HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
} HAL_TickFreqTypeDef;
# 732 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
HAL_StatusTypeDef HAL_Init(void);
HAL_StatusTypeDef HAL_DeInit(void);
void HAL_MspInit(void);
void HAL_MspDeInit(void);
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
# 747 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
void HAL_IncTick(void);
void HAL_Delay(uint32_t Delay);
uint32_t HAL_GetTick(void);
uint32_t HAL_GetTickPrio(void);
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
HAL_TickFreqTypeDef HAL_GetTickFreq(void);
void HAL_SuspendTick(void);
void HAL_ResumeTick(void);
uint32_t HAL_GetHalVersion(void);
uint32_t HAL_GetREVID(void);
uint32_t HAL_GetDEVID(void);
uint32_t HAL_GetUIDw0(void);
uint32_t HAL_GetUIDw1(void);
uint32_t HAL_GetUIDw2(void);
# 771 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
void HAL_DBGMCU_EnableDBGStopMode(void);
void HAL_DBGMCU_DisableDBGStopMode(void);
void HAL_DBGMCU_EnableDBGStandbyMode(void);
void HAL_DBGMCU_DisableDBGStandbyMode(void);
# 784 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
extern volatile uint32_t uwTick;
extern uint32_t uwTickPrio;
extern HAL_TickFreqTypeDef uwTickFreq;
# 805 "D:/projekte/ecs_smartSwitch/trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc\\stm32g0xx_hal.h"
void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void);
void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void);
void HAL_SYSCFG_EnableRemap(uint32_t PinRemap);
void HAL_SYSCFG_DisableRemap(uint32_t PinRemap);





void HAL_SYSCFG_StrobeDBattpinsConfig(uint32_t ConfigDeadBattery);
# 32 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\main.h" 2
# 55 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\main.h"
void Error_Handler(void);
# 133 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\main.h"
enum SOC_CALC_MODE{
  SOC_CALC_MODE_AH_RATED,
  SOC_CALC_MODE_AH_AUTO,
  SOC_CALC_MODE_WH_RATED,
  SOC_CALC_MODE_WH_AUTO,
  SOC_CALC_MODE_WH_AUTO_TEMP,
};

typedef union error_message_t
{
 char msg[sizeof(uint64_t)];
 uint64_t number;
} error_message_t;
# 17 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h" 2
# 1 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\sysdata.h" 1
# 25 "D:/projekte/ecs_smartSwitch/trunk/firmware/Inc\\sysdata.h"
typedef union
{
 uint16_t w;
 int16_t sw;
 uint8_t b[2];
 int8_t sb[2];
} bword_t;



typedef struct
{

 uint16_t device_type;
 uint16_t reserved0;
 uint32_t sn;

 uint16_t fw_revision_major;
 uint16_t fw_revision_minor;

 uint16_t fw_revision_revision;
 uint16_t reserved1;

 uint32_t baudrate;

 uint16_t parityMode;
 uint16_t stopBit;

 uint16_t slave_address;
 uint16_t command;

 uint16_t ibn_day;
 uint16_t ibn_month;
 uint16_t ibn_year;
 uint16_t user_id;
 uint16_t reserved2[8];


 uint16_t lvpStart;
 uint16_t lvpStop;

 uint16_t ovpStart;
 uint16_t ovpStop;

 int16_t loadCurrentLimit;
 int16_t chargeCurrentLimit;


 int16_t chargeStopHighTemperatureStart;
 int16_t chargeStopHighTemperatureStop;

 int16_t chargeStopLowTemperatureStart;
 int16_t chargeStopLowTemperatureStop;

 int16_t dischargeStopHighTemperatureStart;
 int16_t dischargeStopHighTemperatureStop;

 int16_t dischargeStopLowTemperatureStart;
 int16_t dischargeStopLowTemperatureStop;



 uint16_t peukert;
 uint16_t cef;

 uint16_t iBatFull;
 uint16_t tBatFull;

 uint16_t uBatFull;
 uint16_t uBatEmpty;
 uint32_t cellCapacity;
 uint32_t battEnergy;
 uint16_t socCalcMode;
 uint16_t reserved3;
 uint16_t cellRatedDischargeTime;
 int16_t uBatEmptyCompStartTemp;
 int16_t uBatEmptyCompStopTemp;
 uint16_t uBatEmptyCompStopVolt;
 int16_t extraDischargeStrom_mA;
 uint16_t cefW;
 uint16_t lvpMode;
 uint16_t ovpMode;


 int32_t batteryCurrentOffset;
 int16_t batteryCurrentOffsetRefTemperatureShunt;
 int16_t batteryCurrentOffsetRefTemperatureChip;
 int32_t batteryCurrentOffsetRefshuntVoltage;

 int32_t batteryCurrentOffsetCommonModeCalibrationVoltage;
 int32_t batteryCurrentOffsetCommonModeCompensationFactor;

 int16_t batteryCurrentOffsetTemperatureCalibrationTemperature;
 int16_t reserved4;
 int32_t batteryCurrentOffsetTemperatureCompensationFactor;

 int32_t batteryCurrentGainCorrectionFaktor;
 int16_t batteryCurrentGainRefTempShunt;
 int16_t batteryCurrentGainRefTempChip;
 int32_t batteryCurrentGainRefCurrent;

 int16_t batteryCurrentGainTemperatureCalibrationShuntTemperature;
 int16_t reserved5;
 int32_t batteryCurrentGainTemperatureCompensationShuntFactor;
 int16_t batteryCurrentGainTemperatureCalibrationChipTemperature;
 int16_t reserved6;
 int32_t batteryCurrentGainTemperatureCompensationChipFactor;

 uint32_t reserved7[6];

} device_parameter_t;



typedef struct
{
              uint16_t voltageVref;
              uint16_t realVdd;
              int16_t chipTemperature;
              int16_t shuntTemperature;
              int16_t shuntTemperatureMax;
              int16_t shuntTemperatureMin;
              uint32_t shuntVoltage;
              int32_t batteryVoltage;
              int32_t batteryVoltageMax;
              int32_t batteryVoltageMin;
              int32_t batteryCurrent;
              int32_t batteryCurrentMax;
              int32_t batteryCurrentMin;
              int32_t batteryCurrentCorrected;
              int32_t mAhCounter;
              int64_t mAsCounter;
              int32_t soc;
              int16_t ovpState;
              int16_t lvpState;
              int32_t batteryPower;
              int32_t detectedCapacity;
              int32_t detectedEnergy;
              int16_t SoH;
              int16_t efficiency;
              int16_t selfDischarge;
              int16_t selfDischargeAvg;
              int16_t esr;
              int16_t esr_fast;
              uint32_t lastTimeVbatFull;
              uint32_t lastTimeVbatEmpty;
              uint32_t onTime;
              uint32_t dischargeTotalAh;
              uint32_t chargeTotalAh;
              uint32_t dischargeTotalWh;
              uint32_t chargeTotalWh;
              uint16_t fullCyclesCnt;
              uint16_t reserved8;
              int64_t mAs_AutoMode;
              int64_t mWs_AutoMode;
              uint16_t ovp_sense;
              uint16_t lvp_sense;
              uint16_t reserved9;
              uint16_t reserved10;
              uint16_t reserved11;
              uint16_t reserved12;
              uint16_t reserved13;
              uint16_t reserved14;
              uint16_t reserved15;
              uint16_t reserved16;
              uint16_t reserved17;
              uint16_t reserved18;


              int32_t mAh_AutoMode;
              int32_t mWh_AutoMode;
              int64_t mWsCounter;
              int32_t mWhCounter;
              int32_t correctedStromForChargeWhCnt;
              uint16_t uBatEmptyTempComp;
              uint16_t adc_restarts;
              int16_t reserved19;
              int16_t reserved20;
              int32_t battryCurrentRaw;
              int32_t batteryCurrentOffsetCommonModeCorrectionADCSteps;
              int32_t fast_current;
              int32_t fast_voltage;
              int16_t esrCalcStatus;
              uint16_t esrCalcTime;
              int16_t selfDischargeStatus;
              uint16_t selfDischargeTime;
              uint8_t message[24];
              int32_t current_buffer[32];
              int32_t voltage_buffer[32];
              int32_t current_buffer_fast[32];
              int32_t voltage_buffer_fast[32];

} device_values_t;



typedef struct
{
 device_parameter_t parameter;
 device_values_t values;
} sys_data_struct_t;


typedef volatile union
{
 sys_data_struct_t s;
 bword_t mb[sizeof(sys_data_struct_t) / 2];
} sys_data_t;



extern sys_data_t sys_data;



void SYS_DATA_Init(void);
# 18 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h" 2
# 56 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.h"
    typedef enum mb_error_codes_enum
    {
      MB_ERROR_NOTHING = 0,
      MB_ERROR_TIMEOUT = 1,
      MB_ERROR_CRC = 2,
      MB_ERROR_SLAVE_ADRESS = 3,
      MB_ERROR_FUNCTION_CODE = 4,
      MB_ERROR_BYTE_COUNT = 5,
      MB_ERROR_START_ADRESS = 6,
      MB_ERROR_UART_PE = 7,
      MB_ERROR_UART_NE = 8,
      MB_ERROR_UART_FE = 9,
      MB_ERROR_UART_ORE = 10,
    }
    mb_error_codes_t;



    typedef enum
    {
      MB_QUERY_NOTHING,
      MB_QUERY_READ_IDENT,
      MB_QUERY_READ_DATA,
      MB_QUERY_READ_LIPRO_DATA,
      MB_QUERY_WRITE_LIPRO_BALANCER_VOLTAGE,
      MB_QUERY_WRITE_BUTTONS,
      MB_QUERY_GSM_GATEWAY,
      MB_QUERY_REMOTEBUS_GATEWAY,
      MB_QUERY_WRITE_TO_GC,
      MB_QUERY_SEND_DEVICE_ADDRESS,
      MB_QUERY_SEND_SAVE_COMMAND,
      MB_QUERY_GATEWAY,
      MB_QUERY_SEND_DATA
    }
    mb_status_t;


    typedef struct
    {


      UART_HandleTypeDef * uart;
      GPIO_TypeDef * driverEnableGPIO;
      uint16_t driverEnableGPIOPin;
      uint32_t mb_t15_total_timer_ticks;
      uint32_t mb_t35_total_timer_ticks;
      volatile _Bool mb_rx_frame_complete;
      uint32_t response_timeout_counter;

      uint8_t last_query_slave_adress;
      uint8_t last_query_function_code;
      bword_t last_query_start_adress;
      bword_t last_query_number_of_register;
      _Bool last_query_timeout;
      bword_t last_query_tcp_id;
      mb_status_t current_query;
      uint8_t rx_buffer[256];
      uint8_t tx_buffer[256];
      uint32_t rx_head;
      uint32_t tx_head;
      volatile _Bool setTxLed;
      volatile _Bool setRxLed;
    }
    modbus_t;






    void mbTimerIsr (modbus_t * mb_data);

   void mbInit(modbus_t * mb_data, uint32_t baudrate, uint32_t parityMode, uint16_t stopBits, UART_HandleTypeDef * usart);

    _Bool mbGetFrameComplete (modbus_t * mb_data);

    void mbClearRxFrame (modbus_t * mb_data);

    void mbUartIsr (modbus_t* mb_data);





    void mbSlaveProcessRtuQuery (modbus_t * mb_data);

    uint32_t mbSlaveCheckModbusRtuQuery (modbus_t * mb_data);

    uint32_t mbSlaveProcessPdu( uint8_t* response_string, uint8_t * msg, uint32_t tx_position, uint8_t deviceID);


    void mbMasterStartRtuReadHoldingRegister (uint8_t slave_adress, uint16_t start_adress, uint16_t number_of_registers, modbus_t * mb_data);
    _Bool mbMasterGetTimeout (modbus_t * mb_data);
    void mbMasterCheckResponseTimeout (modbus_t * mb_data);
    mb_error_codes_t mbMasterCheckReadMultipleRegisterResponse (modbus_t * mb_data) ;
    mb_error_codes_t check_write_multiple_register_response (modbus_t * mb_data) ;
    void mb_start_rtu_write_multiple_register (uint8_t slave_adress, uint16_t adress, uint16_t * values, uint8_t number_of_registers, modbus_t * mb_data);
    void MODBUS_UART_IRQHandler(UART_HandleTypeDef *huart);
# 13 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c" 2




# 1 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdio.h" 1 3
# 77 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdio.h" 3
typedef long fpos_t;




typedef struct __SEGGER_RTL_FILE_impl FILE;




typedef struct __SEGGER_RTL_POSIX_locale_s *locale_t;
# 97 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdio.h" 3
extern FILE *stdin;
extern FILE *stdout;
extern FILE *stderr;
# 108 "C:/Program Files/SEGGER/SEGGER Embedded Studio 8.22a/include\\stdio.h" 3
int putchar (int __c);
int getchar (void);
int puts (const char *__s);
char * gets (char *__s);
int sprintf (char *__s, const char *__format, ...);
int sprintf_l (char *__s, locale_t __loc, const char *__format, ...);
int snprintf (char *__s, size_t __n, const char *__format, ...);
int snprintf_l (char *__s, size_t __n, locale_t __loc, const char *__format, ...);
int vsnprintf (char *__s, size_t __n, const char *__format, __builtin_va_list __arg);
int vsnprintf_l (char *__s, size_t __n, locale_t __loc, const char *__format, __builtin_va_list __arg);
int printf (const char *__format, ...);
int printf_l (locale_t __loc, const char *__format, ...);
int vprintf (const char *__format, __builtin_va_list __arg);
int vprintf_l (locale_t __loc, const char *__format, __builtin_va_list __arg);
int vsprintf (char *__s, const char *__format, __builtin_va_list __arg);
int vsprintf_l (char *__s, locale_t __loc, const char *__format, __builtin_va_list __arg);
int vasprintf (char **__strp, const char *__format, __builtin_va_list __ap);
int vasprintf_l (char **__strp, locale_t __loc, const char *__format, __builtin_va_list __ap);
int asprintf (char **__strp, const char *__format, ...);
int asprintf_l (char **__strp, locale_t __loc, const char *__format, ...);

int scanf (const char *__format, ...);
int scanf_l (locale_t __loc, const char *__format, ...);
int sscanf (const char *__s, const char *__format, ...);
int sscanf_l (const char *__s, locale_t __loc, const char *__format, ...);
int vscanf (const char *__format, __builtin_va_list __arg);
int vscanf_l (locale_t __loc, const char *__format, __builtin_va_list __arg);
int vsscanf (const char *__s, const char *__format, __builtin_va_list __arg);
int vsscanf_l (const char *__s, locale_t __loc, const char *__format, __builtin_va_list __arg);

void clearerr (FILE *);
int fclose (FILE *);
int feof (FILE *);
int ferror (FILE *);
int fflush (FILE *);
int fgetc (FILE *);
int fgetpos (FILE *, fpos_t *);
char * fgets (char *, int, FILE *);
int fileno (FILE *);
FILE * fopen (const char *, const char *);
int fprintf (FILE *, const char *, ...);
int fprintf_l (FILE *, locale_t, const char *, ...);
int vfprintf (FILE *__stream, const char *__format, __builtin_va_list __arg);
int vfprintf_l (FILE *__stream, locale_t loc, const char *__format, __builtin_va_list __arg);
int fputc (int, FILE *);
int fputs (const char *, FILE *);
size_t fread (void *, size_t, size_t, FILE *);
FILE * freopen (const char *, const char *, FILE *);
int fscanf (FILE *, const char *, ...);
int fscanf_l (FILE *, locale_t, const char *, ...);
int vfscanf (FILE *, const char *, __builtin_va_list);
int vfscanf_l (FILE *, locale_t, const char *, __builtin_va_list);
int fseek (FILE *, long, int);
int fsetpos (FILE *, const fpos_t *);
long ftell (FILE *);
size_t fwrite (const void *, size_t, size_t, FILE *);
int getc (FILE *);
void perror (const char *);
int putc (int, FILE *);
int remove (const char *);
int rename (const char *, const char *);
void rewind (FILE *);
void setbuf (FILE *, char *);
int setvbuf (FILE *, char *, int, size_t);
FILE * tmpfile (void);
char * tmpnam (char *);
int ungetc (int, FILE *);





int dprintf (int, const char *, ...);
int vdprintf (int, const char *, __builtin_va_list);
FILE * fdopen (int, const char *);
# 18 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c" 2
# 69 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  extern modbus_t modbusData;
  extern sys_data_t sys_data;




                    void mbUartInit (modbus_t * mb_data,UART_HandleTypeDef * usart, uint32_t baudrate, uint32_t parityMode, uint32_t stopBits , uint32_t nrOfBitsPerChar);
                uint16_t mbCrc16 (uint8_t *buf, uint32_t len);
                    void mbSend (modbus_t * mb_data );
                uint32_t mbSlaveReadHoldingRegisters (uint8_t * response_string, uint8_t *msg, uint32_t tx_position, uint8_t deviceID);
                uint32_t mbSlaveWriteMultipleRegisters (uint8_t * response_string, uint8_t *msg, uint32_t tx_position, uint32_t deviceID);
                uint32_t mbSlaveWriteSingleRegister (uint8_t * response_string,uint8_t *msg,uint32_t tx_position, uint32_t deviceID);
                uint32_t mbSlaveResponseException (uint8_t* response_string, uint32_t function_code, uint32_t exception_code,uint32_t tx_position) ;
static HAL_StatusTypeDef RS485_ModbusEx_Init (UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime, uint32_t charReceiveTimeout);
static void UART_TxISR_8BIT (UART_HandleTypeDef *huart);
# 104 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  void mbInit(modbus_t* mb_data, uint32_t baudrate, uint32_t parityMode, uint16_t stopBits, UART_HandleTypeDef* usart)
  {
    uint32_t numberOfBitsPerChar;


    if (stopBits < 1U || stopBits > 2U) stopBits = 1U;
# 122 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
    numberOfBitsPerChar = 1U + 8U + stopBits;
    if ((parityMode == 0) || (parityMode == 1))
    {
      numberOfBitsPerChar +=1;
    }

    mbUartInit(mb_data,usart, baudrate, parityMode, stopBits, numberOfBitsPerChar);


    mb_data->last_query_function_code = 0;
    mb_data->last_query_tcp_id.w = 0;
    mb_data->last_query_number_of_register.w = 0;
    mb_data->current_query = MB_QUERY_NOTHING;
    mb_data->last_query_slave_adress = 0;
    mb_data->last_query_start_adress.w = 0;
    mb_data->last_query_timeout = 0;
  }
# 154 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  void mbUartInit(modbus_t * mb_data,UART_HandleTypeDef * usart, uint32_t baudrate, uint32_t parityMode, uint32_t stopBits , uint32_t nrOfBitsPerChar)
  {

    mb_data->uart = usart;


    mb_data->uart->Instance = ((USART_TypeDef *) (((0x40000000UL)) + 0x00013800UL));
    mb_data->uart->Init.BaudRate = 19200;
    mb_data->uart->Init.WordLength = (0x1UL << (12U));
    mb_data->uart->Init.StopBits = 0x00000000U;
    mb_data->uart->Init.Parity = (0x1UL << (10U));
    mb_data->uart->Init.Mode = ((0x1UL << (3U)) |(0x1UL << (2U)));
    mb_data->uart->Init.HwFlowCtl = 0x00000000U;
    mb_data->uart->Init.OverSampling = 0x00000000U;
    mb_data->uart->Init.OneBitSampling = 0x00000000U;
    mb_data->uart->Init.ClockPrescaler = 0x00000000U;
    mb_data->uart->AdvancedInit.AdvFeatureInit = 0x00000000U;




    mb_data->uart->Init.BaudRate = baudrate;

    if(parityMode == 0)
    {
       mb_data->uart->Init.Parity = (0x1UL << (10U));
       mb_data->uart->Init.WordLength = (0x1UL << (12U));
    }
    else if(parityMode == 1)
    {
       mb_data->uart->Init.Parity = ((0x1UL << (10U)) | (0x1UL << (9U)));
       mb_data->uart->Init.WordLength = (0x1UL << (12U));
    }
    else
    {
       mb_data->uart->Init.Parity = 0x00000000U;
       mb_data->uart->Init.WordLength = 0x00000000U;
    }

    if (stopBits == 1)
    {
      mb_data->uart->Init.StopBits = 0x00000000U;
    }
    else
    {
      mb_data->uart->Init.StopBits = (0x2UL << (12U));
    }

    if (RS485_ModbusEx_Init(mb_data->uart, 0x00000000U, 0, 0,3.5*nrOfBitsPerChar) != HAL_OK)
    {
      Error_Handler();
    }
    if (HAL_UARTEx_DisableFifoMode(mb_data->uart) != HAL_OK)
    {
      Error_Handler();
    }

    if(HAL_UART_Receive_IT(mb_data->uart, mb_data->rx_buffer, 256) != HAL_OK)
    {
      printf("uart error \n\r");
      while(1)
      {
      }
    }
  }







  void mbUartEndRxTransfer(UART_HandleTypeDef *huart)
  {





    huart->RxState = 0x00000020U;
  }

  void mbUartRx(modbus_t* mb_data)
  {
    uint32_t pos;
    uint8_t data;

    pos = mb_data->rx_head;

    if (pos >= 256)
    {
      return;
    }

    data = mb_data->uart->Instance->RDR & (uint8_t)0x00FF;
    mb_data->rx_buffer[pos] = data;

    mb_data->rx_head++;


  }

  HAL_StatusTypeDef mbUartTx(UART_HandleTypeDef *huart)
  {
    uint16_t* tmp;

    if(huart->Init.WordLength == (0x1UL << (12U)))
    {
      tmp = (uint16_t*) huart->pTxBuffPtr;
      huart->Instance->TDR = (uint16_t)(*tmp & (uint16_t)0x01FF);

      if(huart->Init.Parity == 0x00000000U)
      {
        huart->pTxBuffPtr += 2;
      }
      else
      {
        huart->pTxBuffPtr += 1;
      }
    }
    else
    {
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
    }

    if(--huart->TxXferCount == 0)
    {

      (((((uint8_t)(0x0727U)) >> 5U) == 1U)? ((huart)->Instance->CR1 &= ~ (1U << ((0x0727U) & 0x001FU))): ((((uint8_t)(0x0727U)) >> 5U) == 2U)? ((huart)->Instance->CR2 &= ~ (1U << ((0x0727U) & 0x001FU))): ((huart)->Instance->CR3 &= ~ (1U << ((0x0727U) & 0x001FU))));


      (((((uint8_t)(0x0626U)) >> 5U) == 1U)? ((huart)->Instance->CR1 |= (1U << ((0x0626U) & 0x001FU))): ((((uint8_t)(0x0626U)) >> 5U) == 2U)? ((huart)->Instance->CR2 |= (1U << ((0x0626U) & 0x001FU))): ((huart)->Instance->CR3 |= (1U << ((0x0626U) & 0x001FU))));
    }
    return HAL_OK;
  }
# 297 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
  {

    ((huart->Instance->CR1) &= ~((0x1UL << (6U))));


    huart->gState = 0x00000020U;


    huart->TxISR = 0;






    HAL_UART_TxCpltCallback(huart);

  }


static HAL_StatusTypeDef RS485_ModbusEx_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime, uint32_t charReceiveTimeout)
{
  uint32_t temp;


  if (huart == 0)
  {
    return HAL_ERROR;
  }

  ((void)0U);


  ((void)0U);


  ((void)0U);


  ((void)0U);

  if (huart->gState == 0x00000000U)
  {

    huart->Lock = HAL_UNLOCKED;
# 356 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
    HAL_UART_MspInit(huart);

  }

  huart->gState = 0x00000024U;


  ((huart)->Instance->CR1 &= ~(0x1UL << (0U)));


  if (UART_SetConfig(huart) == HAL_ERROR)
  {
    return HAL_ERROR;
  }

  if (huart->AdvancedInit.AdvFeatureInit != 0x00000000U)
  {
    UART_AdvFeatureConfig(huart);
  }
# 390 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  ((huart->Instance->CR2) |= ((0x1UL << (23U))));
  ((huart->Instance->CR1) |= ((0x1UL << (26U))));

  if (huart->Init.BaudRate <= 19200) (((huart->Instance->RTOR)) = ((((((huart->Instance->RTOR))) & (~((0xFFFFFFUL << (0U))))) | (charReceiveTimeout))));
  else
  {
      uint32_t fixedDelayInBitDurations = ((1750UL) * huart->Init.BaudRate) / 1000000UL + 1UL;
      (((huart->Instance->RTOR)) = ((((((huart->Instance->RTOR))) & (~((0xFFFFFFUL << (0U))))) | (fixedDelayInBitDurations))));
  }



  ((huart)->Instance->CR1 |= (0x1UL << (0U)));


  return (UART_CheckIdleState(huart));
}


static int test;
void MODBUS_UART_IRQHandler(UART_HandleTypeDef *huart)
{
  uint32_t isrflags = ((huart->Instance->ISR));
  uint32_t cr1its = ((huart->Instance->CR1));
  uint32_t cr2its = ((huart->Instance->CR2));
  uint32_t cr3its = ((huart->Instance->CR3));

  uint32_t errorflags;
  uint32_t errorcode;

  errorflags = (isrflags & (uint32_t)((0x1UL << (0U)) | (0x1UL << (1U)) | (0x1UL << (3U)) | (0x1UL << (2U))));


  if ((errorflags != 0U)
      && ((((cr3its & ((0x1UL << (28U)) | (0x1UL << (0U)))) != 0U)
           || ((cr1its & ((0x1UL << (5U)) | (0x1UL << (8U)))) != 0U))))
  {

    if (((isrflags & (0x1UL << (0U))) != 0U) && ((cr1its & (0x1UL << (8U))) != 0U))
    {
      ((huart)->Instance->ICR = ((0x1UL << (0U))));

      huart->ErrorCode |= ((uint32_t)0x00000001U);
    }


    if (((isrflags & (0x1UL << (1U))) != 0U) && ((cr3its & (0x1UL << (0U))) != 0U))
    {
      ((huart)->Instance->ICR = ((0x1UL << (1U))));

      huart->ErrorCode |= ((uint32_t)0x00000004U);
    }


    if (((isrflags & (0x1UL << (2U))) != 0U) && ((cr3its & (0x1UL << (0U))) != 0U))
    {
      ((huart)->Instance->ICR = ((0x1UL << (2U))));

      huart->ErrorCode |= ((uint32_t)0x00000002U);
    }


    if (((isrflags & (0x1UL << (3U))) != 0U)
        && (((cr1its & (0x1UL << (5U))) != 0U) ||
            ((cr3its & ((0x1UL << (28U)) | (0x1UL << (0U)))) != 0U)))
    {
      ((huart)->Instance->ICR = ((0x1UL << (3U))));

      huart->ErrorCode |= ((uint32_t)0x00000008U);
    }
  }



  if (((isrflags & (0x1UL << (11U))) != 0U)
      && (((cr1its & (0x1UL << (26U))) != 0U)
          || ((cr3its & (0x1UL << (23U))) != 0U)))
  {
    ((huart)->Instance->ICR = ((0x1UL << (11U))));
    huart->RxState = 0x00000020U;
    huart->gState = 0x00000020U;
    modbusData.mb_rx_frame_complete = 1;
    modbusData.setRxLed = 1;

  }


  if (((isrflags & (0x1UL << (5U))) != 0U)
      && (((cr1its & (0x1UL << (5U))) != 0U)
          || ((cr3its & (0x1UL << (28U))) != 0U)))
  {
    if ((huart->RxState == 0x00000022U) && (modbusData.rx_head < 256))
    {
      modbusData.rx_buffer[modbusData.rx_head] = huart->Instance->RDR;

      modbusData.rx_head++;
      modbusData.setRxLed = 1;
    }
    else
    {
      ((huart)->Instance->RQR |= (uint16_t)(((uint16_t)0x0008)));
    }
  }


  if (((isrflags & (0x1UL << (7U))) != 0U)
      && (((cr1its & (0x1UL << (7U))) != 0U)
          || ((cr3its & (0x1UL << (23U))) != 0U)))
  {
    UART_TxISR_8BIT(modbusData.uart);
    modbusData.setTxLed = 1;
  }


  if (((isrflags & (0x1UL << (6U))) != 0U) && ((cr1its & (0x1UL << (6U))) != 0U))
  {
    modbusData.current_query = MB_QUERY_NOTHING;
    UART_EndTransmit_IT(huart);
    huart->RxState = 0x00000022U;
# 517 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  }


  if (huart->ErrorCode != ((uint32_t)0x00000000U))
  {
    huart->RxState = 0x00000022U;

    if (((isrflags & (0x1UL << (5U))) != 0U)
        && (((cr1its & (0x1UL << (5U))) != 0U)
            || ((cr3its & (0x1UL << (28U))) != 0U)))
    {
      ((huart)->Instance->RQR |= (uint16_t)(((uint16_t)0x0008)));
      huart->ErrorCode = ((uint32_t)0x00000000U);
    }
    else if (((isrflags & (0x1UL << (7U))) != 0U)
             && (((cr1its & (0x1UL << (7U))) != 0U)
                 || ((cr3its & (0x1UL << (23U))) != 0U)))
    {
      modbusData.current_query = MB_QUERY_NOTHING;
      UART_EndTransmit_IT(huart);
      huart->RxState = 0x00000022U;
      modbusData.setTxLed = 1;
    }
  }
}
# 556 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{

  if (huart->gState == 0x00000021U)
  {
    if (huart->TxXferCount == 0U)
    {

      ((huart->Instance->CR1) &= ~((0x1UL << (7U))));


      ((huart->Instance->CR1) |= ((0x1UL << (6U))));
    }
    else
    {
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
  else
  {

      ((huart->Instance->CR1) &= ~((0x1UL << (7U))));


      ((huart->Instance->CR1) |= ((0x1UL << (6U))));
  }
}
# 602 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
  void mbTimerIsr(modbus_t * mb_data)
  {
# 612 "D:\\projekte\\ecs_smartSwitch\\trunk\\firmware\\Modbus\\modbus.c"
        mb_data->mb_rx_frame_complete=1;






  }


  void mbSend(modbus_t * mb_data )
  {
    mb_data->current_query = MB_QUERY_SEND_DATA;
    HAL_UART_Transmit_IT(mb_data->uart, mb_data->tx_buffer, mb_data->tx_head);
  }

  void mbClearTxBuffer(modbus_t * mb_data)
  {
    mb_data->tx_head = 0;
  }




  uint16_t mbCrc16 ( uint8_t *buf, uint32_t len)
  {
    uint16_t crc = 0xFFFF;

    for (uint32_t pos = 0; pos < len; pos++)
    {
      crc ^= (uint16_t)buf[pos];

      for (int i = 8; i != 0; i--)
      {
        if ((crc & 0x0001) != 0)
        {
                crc >>= 1;
                crc ^= 0xA001;
        }
        else
        {
                crc >>= 1;
        }
      }
    }


    return crc;
  }


  int mbCheckCrc16( uint8_t *msg, const int msg_length)
  {
    int ret;
    uint16_t crc_calc;
    uint16_t crc_received;

    crc_calc = mbCrc16(msg, msg_length - 2);
    crc_received = (msg[msg_length - 1] << 8) | msg[msg_length - 2];


    if (crc_calc == crc_received) {
            ret = msg_length;
    } else {
            ret = -1;
    }
    return ret;
  }

  uint32_t mbAppendCrc16(uint8_t * buffer, uint32_t tx_position)
  {
    uint16_t crc = mbCrc16( buffer , tx_position);

    uint8_t l_crc = (uint8_t) (crc & 0x00FF) ;
    uint8_t h_crc = (uint8_t) (crc >> 8);
    buffer[tx_position] = l_crc;
    tx_position++;
    buffer[tx_position] = h_crc;
    tx_position++;
    return tx_position;
  }





  _Bool mbGetFrameComplete(modbus_t * mb_data)
  {
          return mb_data->mb_rx_frame_complete;
  }

  void mbClearRxFrame(modbus_t * mb_data)
  {

    mb_data->rx_head = 0;


    mb_data->mb_rx_frame_complete=0;
  }







static bword_t values[1000];
static uint32_t y;
static uint32_t z;

  uint32_t mbSlaveCheckModbusRtuQuery(modbus_t * mb_data)
  {
    uint32_t message_lengh;
    uint8_t *modbus_rx_message;
    modbus_rx_message = mb_data->rx_buffer;
    message_lengh= mb_data->rx_head;
    uint32_t slave_adress;
    slave_adress = modbus_rx_message[0];

    if (message_lengh < 5)
    {
      mbClearRxFrame(mb_data);
      return 0;
    }


    if (mbCheckCrc16(modbus_rx_message,message_lengh) == -1)
    {
      mbClearRxFrame(mb_data);
      return 0;
    }

    if (slave_adress == 0x00)
    {

      return 2;
    }

    else if (slave_adress == sys_data.s.parameter.slave_address)
    {
      return 2;
    }

    mbClearRxFrame(mb_data);
    return 0;
  }

  void mbSlaveProcessRtuQuery(modbus_t * mb_data)
  {
    uint32_t tx_position=0;
    uint8_t *modbus_rx_message;
    modbus_rx_message = &mb_data->rx_buffer[0];


    mbClearTxBuffer(mb_data);


    mb_data->tx_buffer[0] = *modbus_rx_message;
    tx_position++;
    tx_position = mbSlaveProcessPdu(mb_data->tx_buffer , modbus_rx_message,tx_position, *modbus_rx_message);

    tx_position = mbAppendCrc16(mb_data->tx_buffer ,tx_position);
    mb_data->tx_head=tx_position;
    mbSend(mb_data);
    mbClearRxFrame(mb_data);
  }

  uint32_t mbSlaveProcessPdu (uint8_t* response_string, uint8_t * msg, uint32_t tx_position, uint8_t deviceID)
  {
    uint32_t function_code;
    uint32_t ret;

    function_code = msg[0x01];

    switch (function_code)
    {
      case 0x03:
      ret= mbSlaveReadHoldingRegisters(response_string, msg,tx_position, deviceID);
      break;

      case 0x06:
      ret = mbSlaveWriteSingleRegister(response_string, msg,tx_position, deviceID);
      break;

      case 0x10:
      ret=mbSlaveWriteMultipleRegisters(response_string, msg,tx_position, deviceID);
      break;

      default:
      ret=mbSlaveResponseException(response_string,function_code,0x01,tx_position);
      break;
    }

    return ret;
  }


  uint32_t mbSlaveReadHoldingRegisters( uint8_t * response_string, uint8_t *msg, uint32_t tx_position, uint8_t deviceID)
  {
    uint32_t start_adress;
    uint32_t adress;
    uint32_t number_of_registers;


    if((deviceID != sys_data.s.parameter.slave_address) && (deviceID != 0))
    {
       return mbSlaveResponseException(response_string,0x06,0x0B,tx_position);
    }

    start_adress = (msg[0x02] << 8) + msg[0x03];
    number_of_registers = ( msg[0x04] << 8) + msg[0x05];

    if ((number_of_registers < 0x01) || (number_of_registers > 0x7D) )
    {
      return mbSlaveResponseException(response_string,0x03,0x03,tx_position);
    }

    if (start_adress+number_of_registers-1 > ((sizeof(sys_data_struct_t) / 2)-1))
    {
      return mbSlaveResponseException(response_string, 0x03,0x02,tx_position);
    }

    response_string[tx_position] = 0x03;
    tx_position++;
    response_string[tx_position] = number_of_registers * 2;
    tx_position++;

    for(adress=start_adress;adress < (start_adress + number_of_registers);adress++)
    {

      response_string[tx_position] = sys_data.mb[adress].b[1];
      tx_position++;
      response_string[tx_position] = sys_data.mb[adress].b[0];
      tx_position++;
    }

    return tx_position;
  }


  uint32_t mbSlaveWriteMultipleRegisters(uint8_t * response_string, uint8_t *msg, uint32_t tx_position, uint32_t deviceID)
  {

    uint32_t start_adress;
    uint32_t number_of_registers;
    uint32_t adress;
    uint32_t offset;


    if((deviceID != sys_data.s.parameter.slave_address) && (deviceID != 0))
    {
       return mbSlaveResponseException(response_string,0x06,0x0B,tx_position);
    }

    start_adress = (msg[0x02] << 8) + msg[0x03];
    number_of_registers = ( msg[0x04] << 8) + msg[0x05];
    offset=7;

    if ((number_of_registers < 0x01) || (number_of_registers > 0x7B) )
    {
      return mbSlaveResponseException(response_string, 0x10,0x03,tx_position);
    }

    if (start_adress+number_of_registers-1 > ((sizeof(sys_data_struct_t) / 2)-1))
    {
      return mbSlaveResponseException(response_string, 0x10,0x02,tx_position);
    }


    for(adress=start_adress;adress < (start_adress + number_of_registers);adress++)
    {
      sys_data.mb[adress].b[1] = msg[offset];
      sys_data.mb[adress].b[0] = msg[offset+1];
      offset+=2;
    }

    response_string[tx_position] = 0x10;
    tx_position++;
    response_string[tx_position] = start_adress >> 8;
    tx_position++;
    response_string[tx_position] = (uint8_t ) ( start_adress & 0x00FF);
    tx_position++;
    response_string[tx_position] = number_of_registers >> 8;
    tx_position++;
    response_string[tx_position] = (uint8_t ) ( number_of_registers & 0x00FF);
    tx_position++;
    return tx_position;
  }


  uint32_t mbSlaveWriteSingleRegister(uint8_t * response_string,uint8_t *msg,uint32_t tx_position, uint32_t deviceID)
  {

    uint32_t adress;


    if((deviceID != sys_data.s.parameter.slave_address) && (deviceID != 0))
    {
       return mbSlaveResponseException(response_string,0x06,0x0B,tx_position);
    }

    adress = (msg[2] << 8) + msg[3];

    if (adress > ((sizeof(sys_data_struct_t) / 2)-1))
    {
      return mbSlaveResponseException(response_string,0x06,0x02,tx_position);
    }


    sys_data.mb[adress].b[1] = msg[4];
    sys_data.mb[adress].b[0] = msg[5];

    response_string[tx_position]= 0x06;
    tx_position++;
    response_string[tx_position]= adress >> 8;
    tx_position++;
    response_string[tx_position]= (uint8_t ) ( adress & 0x00FF);

    tx_position++;
    response_string[tx_position]= msg[4];
    tx_position++;
    response_string[tx_position]= msg[5];
    tx_position++;

    return tx_position;
  }


  uint32_t mbSlaveResponseException(uint8_t* response_string, uint32_t function_code, uint32_t exception_code,uint32_t tx_position )
  {
    function_code += 0x80;
    response_string[tx_position] = function_code;
    tx_position++;
    response_string[tx_position] = exception_code;
    tx_position++;
    return tx_position;
  }