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stm32g0xx_hal_i2c.h

Last change on this file was 6, checked in by f.jahn, 3 months ago

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1	/**
2	******************************************************************************
3	* @file stm32g0xx_hal_i2c.h
4	* @author MCD Application Team
5	* @brief Header file of I2C HAL module.
6	******************************************************************************
7	* @attention
8	*
9	* <h2><center>© Copyright (c) 2018 STMicroelectronics.
10	* All rights reserved.</center></h2>
11	*
12	* This software component is licensed by ST under BSD 3-Clause license,
13	* the "License"; You may not use this file except in compliance with the
14	* License. You may obtain a copy of the License at:
15	* opensource.org/licenses/BSD-3-Clause
16	*
17	******************************************************************************
18	*/
19
20	/* Define to prevent recursive inclusion -------------------------------------*/
21	#ifndef STM32G0xx_HAL_I2C_H
22	#define STM32G0xx_HAL_I2C_H
23
24	#ifdef __cplusplus
25	extern "C" {
26	#endif
27
28	/* Includes ------------------------------------------------------------------*/
29	#include "stm32g0xx_hal_def.h"
30
31	/** @addtogroup STM32G0xx_HAL_Driver
32	* @{
33	*/
34
35	/** @addtogroup I2C
36	* @{
37	*/
38
39	/* Exported types ------------------------------------------------------------*/
40	/** @defgroup I2C_Exported_Types I2C Exported Types
41	* @{
42	*/
43
44	/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
45	* @brief I2C Configuration Structure definition
46	* @{
47	*/
48	typedef struct
49	{
50	uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
51	This parameter calculated by referring to I2C initialization
52	section in Reference manual */
53
54	uint32_t OwnAddress1; /*!< Specifies the first device own address.
55	This parameter can be a 7-bit or 10-bit address. */
56
57	uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
58	This parameter can be a value of @ref I2C_ADDRESSING_MODE */
59
60	uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
61	This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
62
63	uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
64	This parameter can be a 7-bit address. */
65
66	uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
67	This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
68
69	uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
70	This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
71
72	uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
73	This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
74
75	} I2C_InitTypeDef;
76
77	/**
78	* @}
79	*/
80
81	/** @defgroup HAL_state_structure_definition HAL state structure definition
82	* @brief HAL State structure definition
83	* @note HAL I2C State value coding follow below described bitmap :\n
84	* b7-b6 Error information\n
85	* 00 : No Error\n
86	* 01 : Abort (Abort user request on going)\n
87	* 10 : Timeout\n
88	* 11 : Error\n
89	* b5 Peripheral initialization status\n
90	* 0 : Reset (peripheral not initialized)\n
91	* 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n
92	* b4 (not used)\n
93	* x : Should be set to 0\n
94	* b3\n
95	* 0 : Ready or Busy (No Listen mode ongoing)\n
96	* 1 : Listen (peripheral in Address Listen Mode)\n
97	* b2 Intrinsic process state\n
98	* 0 : Ready\n
99	* 1 : Busy (peripheral busy with some configuration or internal operations)\n
100	* b1 Rx state\n
101	* 0 : Ready (no Rx operation ongoing)\n
102	* 1 : Busy (Rx operation ongoing)\n
103	* b0 Tx state\n
104	* 0 : Ready (no Tx operation ongoing)\n
105	* 1 : Busy (Tx operation ongoing)
106	* @{
107	*/
108	typedef enum
109	{
110	HAL_I2C_STATE_RESET = 0x00U, /!< Peripheral is not yet Initialized /
111	HAL_I2C_STATE_READY = 0x20U, /!< Peripheral Initialized and ready for use /
112	HAL_I2C_STATE_BUSY = 0x24U, /!< An internal process is ongoing /
113	HAL_I2C_STATE_BUSY_TX = 0x21U, /!< Data Transmission process is ongoing /
114	HAL_I2C_STATE_BUSY_RX = 0x22U, /!< Data Reception process is ongoing /
115	HAL_I2C_STATE_LISTEN = 0x28U, /!< Address Listen Mode is ongoing /
116	HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
117	process is ongoing */
118	HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
119	process is ongoing */
120	HAL_I2C_STATE_ABORT = 0x60U, /!< Abort user request ongoing /
121	HAL_I2C_STATE_TIMEOUT = 0xA0U, /!< Timeout state /
122	HAL_I2C_STATE_ERROR = 0xE0U /!< Error /
123
124	} HAL_I2C_StateTypeDef;
125
126	/**
127	* @}
128	*/
129
130	/** @defgroup HAL_mode_structure_definition HAL mode structure definition
131	* @brief HAL Mode structure definition
132	* @note HAL I2C Mode value coding follow below described bitmap :\n
133	* b7 (not used)\n
134	* x : Should be set to 0\n
135	* b6\n
136	* 0 : None\n
137	* 1 : Memory (HAL I2C communication is in Memory Mode)\n
138	* b5\n
139	* 0 : None\n
140	* 1 : Slave (HAL I2C communication is in Slave Mode)\n
141	* b4\n
142	* 0 : None\n
143	* 1 : Master (HAL I2C communication is in Master Mode)\n
144	* b3-b2-b1-b0 (not used)\n
145	* xxxx : Should be set to 0000
146	* @{
147	*/
148	typedef enum
149	{
150	HAL_I2C_MODE_NONE = 0x00U, /!< No I2C communication on going /
151	HAL_I2C_MODE_MASTER = 0x10U, /!< I2C communication is in Master Mode /
152	HAL_I2C_MODE_SLAVE = 0x20U, /!< I2C communication is in Slave Mode /
153	HAL_I2C_MODE_MEM = 0x40U /!< I2C communication is in Memory Mode /
154
155	} HAL_I2C_ModeTypeDef;
156
157	/**
158	* @}
159	*/
160
161	/** @defgroup I2C_Error_Code_definition I2C Error Code definition
162	* @brief I2C Error Code definition
163	* @{
164	*/
165	#define HAL_I2C_ERROR_NONE (0x00000000U) /!< No error /
166	#define HAL_I2C_ERROR_BERR (0x00000001U) /!< BERR error /
167	#define HAL_I2C_ERROR_ARLO (0x00000002U) /!< ARLO error /
168	#define HAL_I2C_ERROR_AF (0x00000004U) /!< ACKF error /
169	#define HAL_I2C_ERROR_OVR (0x00000008U) /!< OVR error /
170	#define HAL_I2C_ERROR_DMA (0x00000010U) /!< DMA transfer error /
171	#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /!< Timeout error /
172	#define HAL_I2C_ERROR_SIZE (0x00000040U) /!< Size Management error /
173	#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /!< DMA Parameter Error /
174	#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175	#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /!< Invalid Callback error /
176	#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
177	#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /!< Invalid Parameters error /
178	/**
179	* @}
180	*/
181
182	/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
183	* @brief I2C handle Structure definition
184	* @{
185	*/
186	typedef struct __I2C_HandleTypeDef
187	{
188	I2C_TypeDef Instance; /!< I2C registers base address */
189
190	I2C_InitTypeDef Init; /!< I2C communication parameters /
191
192	uint8_t pBuffPtr; /!< Pointer to I2C transfer buffer */
193
194	uint16_t XferSize; /!< I2C transfer size /
195
196	__IO uint16_t XferCount; /!< I2C transfer counter /
197
198	__IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
199	be a value of @ref I2C_XFEROPTIONS */
200
201	__IO uint32_t PreviousState; /!< I2C communication Previous state /
202
203	HAL_StatusTypeDef(XferISR)(struct __I2C_HandleTypeDef hi2c, uint32_t ITFlags, uint32_t ITSources); /!< I2C transfer IRQ handler function pointer /
204
205	DMA_HandleTypeDef hdmatx; /!< I2C Tx DMA handle parameters */
206
207	DMA_HandleTypeDef hdmarx; /!< I2C Rx DMA handle parameters */
208
209	HAL_LockTypeDef Lock; /!< I2C locking object /
210
211	__IO HAL_I2C_StateTypeDef State; /!< I2C communication state /
212
213	__IO HAL_I2C_ModeTypeDef Mode; /!< I2C communication mode /
214
215	__IO uint32_t ErrorCode; /!< I2C Error code /
216
217	__IO uint32_t AddrEventCount; /!< I2C Address Event counter /
218
219	#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
220	void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Master Tx Transfer completed callback */
221	void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Master Rx Transfer completed callback */
222	void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Slave Tx Transfer completed callback */
223	void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Slave Rx Transfer completed callback */
224	void (* ListenCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Listen Complete callback */
225	void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Memory Tx Transfer completed callback */
226	void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Memory Rx Transfer completed callback */
227	void (* ErrorCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Error callback */
228	void (* AbortCpltCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Abort callback */
229
230	void (* AddrCallback)(struct __I2C_HandleTypeDef hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /!< I2C Slave Address Match callback */
231
232	void (* MspInitCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Msp Init callback */
233	void (* MspDeInitCallback)(struct __I2C_HandleTypeDef hi2c); /!< I2C Msp DeInit callback */
234
235	#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
236	} I2C_HandleTypeDef;
237
238	#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
239	/**
240	* @brief HAL I2C Callback ID enumeration definition
241	*/
242	typedef enum
243	{
244	HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /!< I2C Master Tx Transfer completed callback ID /
245	HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /!< I2C Master Rx Transfer completed callback ID /
246	HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /!< I2C Slave Tx Transfer completed callback ID /
247	HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /!< I2C Slave Rx Transfer completed callback ID /
248	HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /!< I2C Listen Complete callback ID /
249	HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /!< I2C Memory Tx Transfer callback ID /
250	HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /!< I2C Memory Rx Transfer completed callback ID /
251	HAL_I2C_ERROR_CB_ID = 0x07U, /!< I2C Error callback ID /
252	HAL_I2C_ABORT_CB_ID = 0x08U, /!< I2C Abort callback ID /
253
254	HAL_I2C_MSPINIT_CB_ID = 0x09U, /!< I2C Msp Init callback ID /
255	HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /!< I2C Msp DeInit callback ID /
256
257	} HAL_I2C_CallbackIDTypeDef;
258
259	/**
260	* @brief HAL I2C Callback pointer definition
261	*/
262	typedef void (pI2C_CallbackTypeDef)(I2C_HandleTypeDef hi2c); /!< pointer to an I2C callback function /
263	typedef void (pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /!< pointer to an I2C Address Match callback function /
264
265	#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
266	/**
267	* @}
268	*/
269
270	/**
271	* @}
272	*/
273	/* Exported constants --------------------------------------------------------*/
274
275	/** @defgroup I2C_Exported_Constants I2C Exported Constants
276	* @{
277	*/
278
279	/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
280	* @{
281	*/
282	#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
283	#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE \| I2C_SOFTEND_MODE))
284	#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE \| I2C_SOFTEND_MODE))
285	#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
286	#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
287	#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
288
289	/* List of XferOptions in usage of :
290	* 1- Restart condition in all use cases (direction change or not)
291	*/
292	#define I2C_OTHER_FRAME (0x000000AAU)
293	#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
294	/**
295	* @}
296	*/
297
298	/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
299	* @{
300	*/
301	#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
302	#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
303	/**
304	* @}
305	*/
306
307	/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
308	* @{
309	*/
310	#define I2C_DUALADDRESS_DISABLE (0x00000000U)
311	#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
312	/**
313	* @}
314	*/
315
316	/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
317	* @{
318	*/
319	#define I2C_OA2_NOMASK ((uint8_t)0x00U)
320	#define I2C_OA2_MASK01 ((uint8_t)0x01U)
321	#define I2C_OA2_MASK02 ((uint8_t)0x02U)
322	#define I2C_OA2_MASK03 ((uint8_t)0x03U)
323	#define I2C_OA2_MASK04 ((uint8_t)0x04U)
324	#define I2C_OA2_MASK05 ((uint8_t)0x05U)
325	#define I2C_OA2_MASK06 ((uint8_t)0x06U)
326	#define I2C_OA2_MASK07 ((uint8_t)0x07U)
327	/**
328	* @}
329	*/
330
331	/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
332	* @{
333	*/
334	#define I2C_GENERALCALL_DISABLE (0x00000000U)
335	#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
336	/**
337	* @}
338	*/
339
340	/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
341	* @{
342	*/
343	#define I2C_NOSTRETCH_DISABLE (0x00000000U)
344	#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
345	/**
346	* @}
347	*/
348
349	/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
350	* @{
351	*/
352	#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
353	#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
354	/**
355	* @}
356	*/
357
358	/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
359	* @{
360	*/
361	#define I2C_DIRECTION_TRANSMIT (0x00000000U)
362	#define I2C_DIRECTION_RECEIVE (0x00000001U)
363	/**
364	* @}
365	*/
366
367	/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
368	* @{
369	*/
370	#define I2C_RELOAD_MODE I2C_CR2_RELOAD
371	#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
372	#define I2C_SOFTEND_MODE (0x00000000U)
373	/**
374	* @}
375	*/
376
377	/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
378	* @{
379	*/
380	#define I2C_NO_STARTSTOP (0x00000000U)
381	#define I2C_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP)
382	#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN)
383	#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START)
384	/**
385	* @}
386	*/
387
388	/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
389	* @brief I2C Interrupt definition
390	* Elements values convention: 0xXXXXXXXX
391	* - XXXXXXXX : Interrupt control mask
392	* @{
393	*/
394	#define I2C_IT_ERRI I2C_CR1_ERRIE
395	#define I2C_IT_TCI I2C_CR1_TCIE
396	#define I2C_IT_STOPI I2C_CR1_STOPIE
397	#define I2C_IT_NACKI I2C_CR1_NACKIE
398	#define I2C_IT_ADDRI I2C_CR1_ADDRIE
399	#define I2C_IT_RXI I2C_CR1_RXIE
400	#define I2C_IT_TXI I2C_CR1_TXIE
401	/**
402	* @}
403	*/
404
405	/** @defgroup I2C_Flag_definition I2C Flag definition
406	* @{
407	*/
408	#define I2C_FLAG_TXE I2C_ISR_TXE
409	#define I2C_FLAG_TXIS I2C_ISR_TXIS
410	#define I2C_FLAG_RXNE I2C_ISR_RXNE
411	#define I2C_FLAG_ADDR I2C_ISR_ADDR
412	#define I2C_FLAG_AF I2C_ISR_NACKF
413	#define I2C_FLAG_STOPF I2C_ISR_STOPF
414	#define I2C_FLAG_TC I2C_ISR_TC
415	#define I2C_FLAG_TCR I2C_ISR_TCR
416	#define I2C_FLAG_BERR I2C_ISR_BERR
417	#define I2C_FLAG_ARLO I2C_ISR_ARLO
418	#define I2C_FLAG_OVR I2C_ISR_OVR
419	#define I2C_FLAG_PECERR I2C_ISR_PECERR
420	#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
421	#define I2C_FLAG_ALERT I2C_ISR_ALERT
422	#define I2C_FLAG_BUSY I2C_ISR_BUSY
423	#define I2C_FLAG_DIR I2C_ISR_DIR
424	/**
425	* @}
426	*/
427
428	/**
429	* @}
430	*/
431
432	/* Exported macros -----------------------------------------------------------*/
433
434	/** @defgroup I2C_Exported_Macros I2C Exported Macros
435	* @{
436	*/
437
438	/** @brief Reset I2C handle state.
439	* @param __HANDLE__ specifies the I2C Handle.
440	* @retval None
441	*/
442	#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
443	#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
444	(__HANDLE__)->State = HAL_I2C_STATE_RESET; \
445	(__HANDLE__)->MspInitCallback = NULL; \
446	(__HANDLE__)->MspDeInitCallback = NULL; \
447	} while(0)
448	#else
449	#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
450	#endif
451
452	/** @brief Enable the specified I2C interrupt.
453	* @param __HANDLE__ specifies the I2C Handle.
454	* @param __INTERRUPT__ specifies the interrupt source to enable.
455	* This parameter can be one of the following values:
456	* @arg @ref I2C_IT_ERRI Errors interrupt enable
457	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
458	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
459	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
460	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
461	* @arg @ref I2C_IT_RXI RX interrupt enable
462	* @arg @ref I2C_IT_TXI TX interrupt enable
463	*
464	* @retval None
465	*/
466	#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 \|= (__INTERRUPT__))
467
468	/** @brief Disable the specified I2C interrupt.
469	* @param __HANDLE__ specifies the I2C Handle.
470	* @param __INTERRUPT__ specifies the interrupt source to disable.
471	* This parameter can be one of the following values:
472	* @arg @ref I2C_IT_ERRI Errors interrupt enable
473	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
474	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
475	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
476	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
477	* @arg @ref I2C_IT_RXI RX interrupt enable
478	* @arg @ref I2C_IT_TXI TX interrupt enable
479	*
480	* @retval None
481	*/
482	#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
483
484	/** @brief Check whether the specified I2C interrupt source is enabled or not.
485	* @param __HANDLE__ specifies the I2C Handle.
486	* @param __INTERRUPT__ specifies the I2C interrupt source to check.
487	* This parameter can be one of the following values:
488	* @arg @ref I2C_IT_ERRI Errors interrupt enable
489	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
490	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
491	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
492	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
493	* @arg @ref I2C_IT_RXI RX interrupt enable
494	* @arg @ref I2C_IT_TXI TX interrupt enable
495	*
496	* @retval The new state of __INTERRUPT__ (SET or RESET).
497	*/
498	#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
499
500	/** @brief Check whether the specified I2C flag is set or not.
501	* @param __HANDLE__ specifies the I2C Handle.
502	* @param __FLAG__ specifies the flag to check.
503	* This parameter can be one of the following values:
504	* @arg @ref I2C_FLAG_TXE Transmit data register empty
505	* @arg @ref I2C_FLAG_TXIS Transmit interrupt status
506	* @arg @ref I2C_FLAG_RXNE Receive data register not empty
507	* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
508	* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
509	* @arg @ref I2C_FLAG_STOPF STOP detection flag
510	* @arg @ref I2C_FLAG_TC Transfer complete (master mode)
511	* @arg @ref I2C_FLAG_TCR Transfer complete reload
512	* @arg @ref I2C_FLAG_BERR Bus error
513	* @arg @ref I2C_FLAG_ARLO Arbitration lost
514	* @arg @ref I2C_FLAG_OVR Overrun/Underrun
515	* @arg @ref I2C_FLAG_PECERR PEC error in reception
516	* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
517	* @arg @ref I2C_FLAG_ALERT SMBus alert
518	* @arg @ref I2C_FLAG_BUSY Bus busy
519	* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
520	*
521	* @retval The new state of __FLAG__ (SET or RESET).
522	*/
523	#define I2C_FLAG_MASK (0x0001FFFFU)
524	#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
525
526	/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
527	* @param __HANDLE__ specifies the I2C Handle.
528	* @param __FLAG__ specifies the flag to clear.
529	* This parameter can be any combination of the following values:
530	* @arg @ref I2C_FLAG_TXE Transmit data register empty
531	* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
532	* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
533	* @arg @ref I2C_FLAG_STOPF STOP detection flag
534	* @arg @ref I2C_FLAG_BERR Bus error
535	* @arg @ref I2C_FLAG_ARLO Arbitration lost
536	* @arg @ref I2C_FLAG_OVR Overrun/Underrun
537	* @arg @ref I2C_FLAG_PECERR PEC error in reception
538	* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
539	* @arg @ref I2C_FLAG_ALERT SMBus alert
540	*
541	* @retval None
542	*/
543	#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR \|= (__FLAG__)) \
544	: ((__HANDLE__)->Instance->ICR = (__FLAG__)))
545
546	/** @brief Enable the specified I2C peripheral.
547	* @param __HANDLE__ specifies the I2C Handle.
548	* @retval None
549	*/
550	#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
551
552	/** @brief Disable the specified I2C peripheral.
553	* @param __HANDLE__ specifies the I2C Handle.
554	* @retval None
555	*/
556	#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
557
558	/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
559	* @param __HANDLE__ specifies the I2C Handle.
560	* @retval None
561	*/
562	#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
563	/**
564	* @}
565	*/
566
567	/* Include I2C HAL Extended module */
568	#include "stm32g0xx_hal_i2c_ex.h"
569
570	/* Exported functions --------------------------------------------------------*/
571	/** @addtogroup I2C_Exported_Functions
572	* @{
573	*/
574
575	/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
576	* @{
577	*/
578	/* Initialization and de-initialization functions******************************/
579	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
580	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
581	void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
582	void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
583
584	/* Callbacks Register/UnRegister functions ***********************************/
585	#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
586	HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
587	HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
588
589	HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
590	HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
591	#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
592	/**
593	* @}
594	*/
595
596	/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
597	* @{
598	*/
599	/* IO operation functions ****************************************************/
600	/******* Blocking mode: Polling */
601	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
602	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
603	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
604	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
605	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
606	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
607	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
608
609	/******* Non-Blocking mode: Interrupt */
610	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
611	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
612	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
613	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
614	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
615	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
616
617	HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
618	HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
619	HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
620	HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
621	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
622	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
623	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
624
625	/******* Non-Blocking mode: DMA */
626	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
627	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
628	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
629	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
630	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
631	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
632
633	HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
634	HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
635	HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
636	HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
637	/**
638	* @}
639	*/
640
641	/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
642	* @{
643	*/
644	/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
645	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
646	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
647	void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
648	void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
649	void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
650	void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
651	void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
652	void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
653	void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
654	void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
655	void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
656	void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
657	/**
658	* @}
659	*/
660
661	/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
662	* @{
663	*/
664	/* Peripheral State, Mode and Error functions *********************************/
665	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
666	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
667	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
668
669	/**
670	* @}
671	*/
672
673	/**
674	* @}
675	*/
676
677	/* Private constants ---------------------------------------------------------*/
678	/** @defgroup I2C_Private_Constants I2C Private Constants
679	* @{
680	*/
681
682	/**
683	* @}
684	*/
685
686	/* Private macros ------------------------------------------------------------*/
687	/** @defgroup I2C_Private_Macro I2C Private Macros
688	* @{
689	*/
690
691	#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) \|\| \
692	((MODE) == I2C_ADDRESSINGMODE_10BIT))
693
694	#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) \|\| \
695	((ADDRESS) == I2C_DUALADDRESS_ENABLE))
696
697	#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) \|\| \
698	((MASK) == I2C_OA2_MASK01) \|\| \
699	((MASK) == I2C_OA2_MASK02) \|\| \
700	((MASK) == I2C_OA2_MASK03) \|\| \
701	((MASK) == I2C_OA2_MASK04) \|\| \
702	((MASK) == I2C_OA2_MASK05) \|\| \
703	((MASK) == I2C_OA2_MASK06) \|\| \
704	((MASK) == I2C_OA2_MASK07))
705
706	#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) \|\| \
707	((CALL) == I2C_GENERALCALL_ENABLE))
708
709	#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) \|\| \
710	((STRETCH) == I2C_NOSTRETCH_ENABLE))
711
712	#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) \|\| \
713	((SIZE) == I2C_MEMADD_SIZE_16BIT))
714
715	#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) \|\| \
716	((MODE) == I2C_AUTOEND_MODE) \|\| \
717	((MODE) == I2C_SOFTEND_MODE))
718
719	#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) \|\| \
720	((REQUEST) == I2C_GENERATE_START_READ) \|\| \
721	((REQUEST) == I2C_GENERATE_START_WRITE) \|\| \
722	((REQUEST) == I2C_NO_STARTSTOP))
723
724	#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) \|\| \
725	((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) \|\| \
726	((REQUEST) == I2C_NEXT_FRAME) \|\| \
727	((REQUEST) == I2C_FIRST_AND_LAST_FRAME) \|\| \
728	((REQUEST) == I2C_LAST_FRAME) \|\| \
729	((REQUEST) == I2C_LAST_FRAME_NO_STOP) \|\| \
730	IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
731
732	#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) \|\| \
733	((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
734
735	#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_HEAD10R \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_RD_WRN)))
736
737	#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))
738	#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))
739	#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
740	#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
741	#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
742
743	#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
744	#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
745
746	#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
747	#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
748
749	#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_START) \| (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
750	(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_ADD10) \| (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
751
752	#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
753	#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
754	/**
755	* @}
756	*/
757
758	/* Private Functions ---------------------------------------------------------*/
759	/** @defgroup I2C_Private_Functions I2C Private Functions
760	* @{
761	*/
762	/* Private functions are defined in stm32g0xx_hal_i2c.c file */
763	/**
764	* @}
765	*/
766
767	/**
768	* @}
769	*/
770
771	/**
772	* @}
773	*/
774
775	#ifdef __cplusplus
776	}
777	#endif
778
779
780	#endif /* STM32G0xx_HAL_I2C_H */
781
782	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c.h

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