source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rng.h

Last change on this file was 6, checked in by f.jahn, 3 months ago
File size: 10.8 KB
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1/**
2  ******************************************************************************
3  * @file    stm32g0xx_ll_rng.h
4  * @author  MCD Application Team
5  * @brief   Header file of RNG LL module.
6  ******************************************************************************
7  * @attention
8  *
9  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
10  * All rights reserved.</center></h2>
11  *
12  * This software component is licensed by ST under BSD 3-Clause license,
13  * the "License"; You may not use this file except in compliance with the
14  * License. You may obtain a copy of the License at:
15  *                        opensource.org/licenses/BSD-3-Clause
16  *
17  ******************************************************************************
18  */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32G0xx_LL_RNG_H
22#define STM32G0xx_LL_RNG_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32g0xx.h"
30
31/** @addtogroup STM32G0xx_LL_Driver
32  * @{
33  */
34
35#if defined(RNG)
36
37/** @defgroup RNG_LL RNG
38  * @{
39  */
40
41/* Private types -------------------------------------------------------------*/
42/* Private variables ---------------------------------------------------------*/
43/* Private constants ---------------------------------------------------------*/
44/* Private macros ------------------------------------------------------------*/
45
46/* Exported types ------------------------------------------------------------*/
47#if defined(USE_FULL_LL_DRIVER)
48/** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
49  * @{
50  */
51
52/**
53  * @brief LL RNG Init Structure Definition
54  */
55typedef struct
56{
57  uint32_t         ClockErrorDetection; /*!< Clock error detection.
58                                      This parameter can be one value of @ref RNG_LL_CED.
59
60                                      This parameter can be modified using unitary functions @ref LL_RNG_EnableClkErrorDetect(). */
61} LL_RNG_InitTypeDef;
62
63/**
64  * @}
65  */
66#endif /* USE_FULL_LL_DRIVER */
67
68/* Exported constants --------------------------------------------------------*/
69/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
70  * @{
71  */
72
73/** @defgroup RNG_LL_CED Clock Error Detection
74  * @{
75  */
76#define LL_RNG_CED_ENABLE         0x00000000U              /*!< Clock error detection enabled  */
77#define LL_RNG_CED_DISABLE        RNG_CR_CED               /*!< Clock error detection disabled */
78/**
79  * @}
80  */
81
82/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
83  * @brief    Flags defines which can be used with LL_RNG_ReadReg function
84  * @{
85  */
86#define LL_RNG_SR_DRDY RNG_SR_DRDY    /*!< Register contains valid random data */
87#define LL_RNG_SR_CECS RNG_SR_CECS    /*!< Clock error current status */
88#define LL_RNG_SR_SECS RNG_SR_SECS    /*!< Seed error current status */
89#define LL_RNG_SR_CEIS RNG_SR_CEIS    /*!< Clock error interrupt status */
90#define LL_RNG_SR_SEIS RNG_SR_SEIS    /*!< Seed error interrupt status */
91/**
92  * @}
93  */
94
95/** @defgroup RNG_LL_EC_IT IT Defines
96  * @brief    IT defines which can be used with LL_RNG_ReadReg and  LL_RNG_WriteReg macros
97  * @{
98  */
99#define LL_RNG_CR_IE   RNG_CR_IE      /*!< RNG Interrupt enable */
100/**
101  * @}
102  */
103
104/**
105  * @}
106  */
107
108/* Exported macro ------------------------------------------------------------*/
109/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
110  * @{
111  */
112
113/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
114  * @{
115  */
116
117/**
118  * @brief  Write a value in RNG register
119  * @param  __INSTANCE__ RNG Instance
120  * @param  __REG__ Register to be written
121  * @param  __VALUE__ Value to be written in the register
122  * @retval None
123  */
124#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
125
126/**
127  * @brief  Read a value in RNG register
128  * @param  __INSTANCE__ RNG Instance
129  * @param  __REG__ Register to be read
130  * @retval Register value
131  */
132#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
133/**
134  * @}
135  */
136
137/**
138  * @}
139  */
140
141
142/* Exported functions --------------------------------------------------------*/
143/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
144  * @{
145  */
146/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
147  * @{
148  */
149
150/**
151  * @brief  Enable Random Number Generation
152  * @rmtoll CR           RNGEN         LL_RNG_Enable
153  * @param  RNGx RNG Instance
154  * @retval None
155  */
156__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
157{
158  SET_BIT(RNGx->CR, RNG_CR_RNGEN);
159}
160
161/**
162  * @brief  Disable Random Number Generation
163  * @rmtoll CR           RNGEN         LL_RNG_Disable
164  * @param  RNGx RNG Instance
165  * @retval None
166  */
167__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
168{
169  CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
170}
171
172/**
173  * @brief  Check if Random Number Generator is enabled
174  * @rmtoll CR           RNGEN         LL_RNG_IsEnabled
175  * @param  RNGx RNG Instance
176  * @retval State of bit (1 or 0).
177  */
178__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
179{
180  return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
181}
182
183/**
184  * @brief  Enable Clock Error Detection
185  * @rmtoll CR           CED           LL_RNG_EnableClkErrorDetect
186  * @param  RNGx RNG Instance
187  * @retval None
188  */
189__STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
190{
191  CLEAR_BIT(RNGx->CR, RNG_CR_CED);
192}
193
194/**
195  * @brief  Disable RNG Clock Error Detection
196  * @rmtoll CR           CED         LL_RNG_DisableClkErrorDetect
197  * @param  RNGx RNG Instance
198  * @retval None
199  */
200__STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
201{
202  SET_BIT(RNGx->CR, RNG_CR_CED);
203}
204
205/**
206  * @brief  Check if RNG Clock Error Detection is enabled
207  * @rmtoll CR           CED         LL_RNG_IsEnabledClkErrorDetect
208  * @param  RNGx RNG Instance
209  * @retval State of bit (1 or 0).
210  */
211__STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef *RNGx)
212{
213  return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL);
214}
215
216/**
217  * @}
218  */
219
220/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
221  * @{
222  */
223
224/**
225  * @brief  Indicate if the RNG Data ready Flag is set or not
226  * @rmtoll SR           DRDY          LL_RNG_IsActiveFlag_DRDY
227  * @param  RNGx RNG Instance
228  * @retval State of bit (1 or 0).
229  */
230__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
231{
232  return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
233}
234
235/**
236  * @brief  Indicate if the Clock Error Current Status Flag is set or not
237  * @rmtoll SR           CECS          LL_RNG_IsActiveFlag_CECS
238  * @param  RNGx RNG Instance
239  * @retval State of bit (1 or 0).
240  */
241__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
242{
243  return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
244}
245
246/**
247  * @brief  Indicate if the Seed Error Current Status Flag is set or not
248  * @rmtoll SR           SECS          LL_RNG_IsActiveFlag_SECS
249  * @param  RNGx RNG Instance
250  * @retval State of bit (1 or 0).
251  */
252__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
253{
254  return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
255}
256
257/**
258  * @brief  Indicate if the Clock Error Interrupt Status Flag is set or not
259  * @rmtoll SR           CEIS          LL_RNG_IsActiveFlag_CEIS
260  * @param  RNGx RNG Instance
261  * @retval State of bit (1 or 0).
262  */
263__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
264{
265  return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
266}
267
268/**
269  * @brief  Indicate if the Seed Error Interrupt Status Flag is set or not
270  * @rmtoll SR           SEIS          LL_RNG_IsActiveFlag_SEIS
271  * @param  RNGx RNG Instance
272  * @retval State of bit (1 or 0).
273  */
274__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
275{
276  return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
277}
278
279/**
280  * @brief  Clear Clock Error interrupt Status (CEIS) Flag
281  * @rmtoll SR           CEIS          LL_RNG_ClearFlag_CEIS
282  * @param  RNGx RNG Instance
283  * @retval None
284  */
285__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
286{
287  WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
288}
289
290/**
291  * @brief  Clear Seed Error interrupt Status (SEIS) Flag
292  * @rmtoll SR           SEIS          LL_RNG_ClearFlag_SEIS
293  * @param  RNGx RNG Instance
294  * @retval None
295  */
296__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
297{
298  WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
299}
300
301/**
302  * @}
303  */
304
305/** @defgroup RNG_LL_EF_IT_Management IT Management
306  * @{
307  */
308
309/**
310  * @brief  Enable Random Number Generator Interrupt
311  *         (applies for either Seed error, Clock Error or Data ready interrupts)
312  * @rmtoll CR           IE            LL_RNG_EnableIT
313  * @param  RNGx RNG Instance
314  * @retval None
315  */
316__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
317{
318  SET_BIT(RNGx->CR, RNG_CR_IE);
319}
320
321/**
322  * @brief  Disable Random Number Generator Interrupt
323  *         (applies for either Seed error, Clock Error or Data ready interrupts)
324  * @rmtoll CR           IE            LL_RNG_DisableIT
325  * @param  RNGx RNG Instance
326  * @retval None
327  */
328__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
329{
330  CLEAR_BIT(RNGx->CR, RNG_CR_IE);
331}
332
333/**
334  * @brief  Check if Random Number Generator Interrupt is enabled
335  *         (applies for either Seed error, Clock Error or Data ready interrupts)
336  * @rmtoll CR           IE            LL_RNG_IsEnabledIT
337  * @param  RNGx RNG Instance
338  * @retval State of bit (1 or 0).
339  */
340__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
341{
342  return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
343}
344
345/**
346  * @}
347  */
348
349/** @defgroup RNG_LL_EF_Data_Management Data Management
350  * @{
351  */
352
353/**
354  * @brief  Return32-bit Random Number value
355  * @rmtoll DR           RNDATA        LL_RNG_ReadRandData32
356  * @param  RNGx RNG Instance
357  * @retval Generated 32-bit random value
358  */
359__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
360{
361  return (uint32_t)(READ_REG(RNGx->DR));
362}
363
364/**
365  * @}
366  */
367
368#if defined(USE_FULL_LL_DRIVER)
369/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
370  * @{
371  */
372ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
373void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
374ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
375
376/**
377  * @}
378  */
379#endif /* USE_FULL_LL_DRIVER */
380
381/**
382  * @}
383  */
384
385/**
386  * @}
387  */
388
389#endif /* defined(RNG) */
390
391/**
392  * @}
393  */
394
395#ifdef __cplusplus
396}
397#endif
398
399#endif /* STM32G0xx_LL_RNG_H */
400
401/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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