1 | /** |
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2 | ****************************************************************************** |
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3 | * @file stm32g0xx_hal_dac.c |
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4 | * @author MCD Application Team |
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5 | * @brief DAC HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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8 | * + Initialization and de-initialization functions |
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9 | * + IO operation functions |
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10 | * + Peripheral Control functions |
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11 | * + Peripheral State and Errors functions |
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12 | * |
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13 | * |
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14 | @verbatim |
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15 | ============================================================================== |
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16 | ##### DAC Peripheral features ##### |
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17 | ============================================================================== |
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18 | [..] |
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19 | *** DAC Channels *** |
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20 | ==================== |
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21 | [..] |
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22 | STM32G0 devices integrate two 12-bit Digital Analog Converters |
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23 | |
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24 | The 2 converters (i.e. channel1 & channel2) |
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25 | can be used independently or simultaneously (dual mode): |
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26 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
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27 | peripherals (ex. timers). |
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28 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
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29 | peripherals (ex. timers). |
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30 | |
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31 | *** DAC Triggers *** |
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32 | ==================== |
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33 | [..] |
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34 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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35 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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36 | [..] |
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37 | Digital to Analog conversion can be triggered by: |
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38 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
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39 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
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40 | |
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41 | (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7 |
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42 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...) |
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43 | |
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44 | (#) Software using DAC_TRIGGER_SOFTWARE |
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45 | |
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46 | *** DAC Buffer mode feature *** |
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47 | =============================== |
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48 | [..] |
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49 | Each DAC channel integrates an output buffer that can be used to |
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50 | reduce the output impedance, and to drive external loads directly |
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51 | without having to add an external operational amplifier. |
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52 | To enable, the output buffer use |
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53 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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54 | [..] |
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55 | (@) Refer to the device datasheet for more details about output |
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56 | impedance value with and without output buffer. |
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57 | |
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58 | *** DAC connect feature *** |
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59 | =============================== |
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60 | [..] |
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61 | Each DAC channel can be connected internally. |
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62 | To connect, use |
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63 | sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE; |
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64 | |
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65 | *** GPIO configurations guidelines *** |
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66 | ===================== |
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67 | [..] |
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68 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
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69 | (ex channel2 on PA5 is configured in Analog and disabled). |
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70 | Channel1 may disturb channel2 as coupling effect. |
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71 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
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72 | Coupling on adjacent channel could be avoided as follows: |
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73 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
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74 | PA5 is configured in ANALOG just before it is turned on. |
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75 | |
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76 | *** DAC Sample and Hold feature *** |
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77 | ======================== |
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78 | [..] |
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79 | For each converter, 2 modes are supported: normal mode and |
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80 | "sample and hold" mode (i.e. low power mode). |
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81 | In the sample and hold mode, the DAC core converts data, then holds the |
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82 | converted voltage on a capacitor. When not converting, the DAC cores and |
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83 | buffer are completely turned off between samples and the DAC output is |
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84 | tri-stated, therefore reducing the overall power consumption. A new |
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85 | stabilization period is needed before each new conversion. |
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86 | |
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87 | The sample and hold allow setting internal or external voltage @ |
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88 | low power consumption cost (output value can be at any given rate either |
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89 | by CPU or DMA). |
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90 | |
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91 | The Sample and hold block and registers uses either LSI & run in |
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92 | several power modes: run mode, sleep mode, low power run, low power sleep |
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93 | mode & stop1 mode. |
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94 | |
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95 | Low power stop1 mode allows only static conversion. |
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96 | |
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97 | To enable Sample and Hold mode |
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98 | Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI & |
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99 | RCC_LSI_ON parameters. |
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100 | |
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101 | Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE; |
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102 | & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime, |
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103 | DAC_HoldTime & DAC_RefreshTime; |
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104 | |
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105 | *** DAC calibration feature *** |
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106 | =================================== |
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107 | [..] |
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108 | (#) The 2 converters (channel1 & channel2) provide calibration capabilities. |
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109 | (++) Calibration aims at correcting some offset of output buffer. |
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110 | (++) The DAC uses either factory calibration settings OR user defined |
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111 | calibration (trimming) settings (i.e. trimming mode). |
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112 | (++) The user defined settings can be figured out using self calibration |
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113 | handled by HAL_DACEx_SelfCalibrate. |
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114 | (++) HAL_DACEx_SelfCalibrate: |
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115 | (+++) Runs automatically the calibration. |
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116 | (+++) Enables the user trimming mode |
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117 | (+++) Updates a structure with trimming values with fresh calibration |
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118 | results. |
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119 | The user may store the calibration results for larger |
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120 | (ex monitoring the trimming as a function of temperature |
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121 | for instance) |
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122 | |
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123 | *** DAC wave generation feature *** |
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124 | =================================== |
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125 | [..] |
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126 | Both DAC channels can be used to generate |
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127 | (#) Noise wave |
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128 | (#) Triangle wave |
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129 | |
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130 | *** DAC data format *** |
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131 | ======================= |
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132 | [..] |
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133 | The DAC data format can be: |
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134 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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135 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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136 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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137 | |
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138 | *** DAC data value to voltage correspondence *** |
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139 | ================================================ |
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140 | [..] |
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141 | The analog output voltage on each DAC channel pin is determined |
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142 | by the following equation: |
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143 | [..] |
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144 | DAC_OUTx = VREF+ * DOR / 4095 |
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145 | (+) with DOR is the Data Output Register |
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146 | [..] |
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147 | VEF+ is the input voltage reference (refer to the device datasheet) |
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148 | [..] |
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149 | e.g. To set DAC_OUT1 to 0.7V, use |
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150 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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151 | |
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152 | *** DMA requests *** |
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153 | ===================== |
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154 | [..] |
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155 | A DMA1 request can be generated when an external trigger (but not a software trigger) |
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156 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
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157 | DMA requests are mapped as following: |
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158 | (#) DAC channel1: mapped on DMA channel1 request 8 |
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159 | (#) DAC channel2: mapped on DMA channel2 request 9 |
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160 | |
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161 | [..] |
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162 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
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163 | refer to Extended Features Driver description |
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164 | |
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165 | ##### How to use this driver ##### |
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166 | ============================================================================== |
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167 | [..] |
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168 | (+) DAC APB clock must be enabled to get write access to DAC |
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169 | registers using HAL_DAC_Init() |
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170 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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171 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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172 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
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173 | |
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174 | *** Calibration mode IO operation *** |
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175 | ====================================== |
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176 | [..] |
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177 | (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset() |
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178 | (+) Run the calibration using HAL_DACEx_SelfCalibrate() |
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179 | (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming() |
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180 | |
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181 | *** Polling mode IO operation *** |
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182 | ================================= |
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183 | [..] |
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184 | (+) Start the DAC peripheral using HAL_DAC_Start() |
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185 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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186 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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187 | |
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188 | *** DMA mode IO operation *** |
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189 | ============================== |
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190 | [..] |
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191 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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192 | of data to be transferred at each end of conversion |
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193 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
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194 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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195 | function is executed and user can add his own code by customization of function pointer |
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196 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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197 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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198 | function is executed and user can add his own code by customization of function pointer |
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199 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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200 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
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201 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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202 | (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
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203 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
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204 | function is executed and user can add his own code by customization of function pointer |
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205 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
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206 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
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207 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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208 | |
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209 | *** Callback registration *** |
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210 | ============================================= |
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211 | [..] |
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212 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
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213 | allows the user to configure dynamically the driver callbacks. |
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214 | |
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215 | Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, |
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216 | it allows to register following callbacks: |
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217 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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218 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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219 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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220 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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221 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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222 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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223 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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224 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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225 | (+) MspInitCallback : DAC MspInit. |
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226 | (+) MspDeInitCallback : DAC MspdeInit. |
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227 | This function takes as parameters the HAL peripheral handle, the Callback ID |
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228 | and a pointer to the user callback function. |
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229 | |
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230 | Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default |
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231 | weak (surcharged) function. It allows to reset following callbacks: |
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232 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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233 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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234 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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235 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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236 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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237 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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238 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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239 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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240 | (+) MspInitCallback : DAC MspInit. |
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241 | (+) MspDeInitCallback : DAC MspdeInit. |
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242 | (+) All Callbacks |
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243 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
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244 | |
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245 | By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
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246 | all callbacks are reset to the corresponding legacy weak (surcharged) functions. |
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247 | Exception done for MspInit and MspDeInit callbacks that are respectively |
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248 | reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init |
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249 | and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
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250 | If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit |
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251 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
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252 | |
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253 | Callbacks can be registered/unregistered in READY state only. |
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254 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
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255 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
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256 | during the Init/DeInit. |
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257 | In that case first register the MspInit/MspDeInit user callbacks |
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258 | using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit |
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259 | or @ref HAL_DAC_Init function. |
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260 | |
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261 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
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262 | not defined, the callback registering feature is not available |
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263 | and weak (surcharged) callbacks are used. |
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264 | |
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265 | *** DAC HAL driver macros list *** |
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266 | ============================================= |
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267 | [..] |
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268 | Below the list of most used macros in DAC HAL driver. |
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269 | |
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270 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral |
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271 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral |
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272 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags |
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273 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status |
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274 | |
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275 | [..] |
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276 | (@) You can refer to the DAC HAL driver header file for more useful macros |
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277 | |
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278 | @endverbatim |
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279 | ****************************************************************************** |
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280 | * @attention |
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281 | * |
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282 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
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283 | * All rights reserved.</center></h2> |
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284 | * |
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285 | * This software component is licensed by ST under BSD 3-Clause license, |
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286 | * the "License"; You may not use this file except in compliance with the |
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287 | * License. You may obtain a copy of the License at: |
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288 | * opensource.org/licenses/BSD-3-Clause |
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289 | * |
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290 | ****************************************************************************** |
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291 | */ |
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292 | |
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293 | /* Includes ------------------------------------------------------------------*/ |
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294 | #include "stm32g0xx_hal.h" |
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295 | |
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296 | /** @addtogroup STM32G0xx_HAL_Driver |
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297 | * @{ |
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298 | */ |
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299 | |
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300 | #ifdef HAL_DAC_MODULE_ENABLED |
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301 | #if defined(DAC1) |
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302 | |
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303 | /** @defgroup DAC DAC |
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304 | * @brief DAC driver modules |
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305 | * @{ |
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306 | */ |
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307 | |
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308 | /* Private typedef -----------------------------------------------------------*/ |
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309 | /* Private define ------------------------------------------------------------*/ |
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310 | /* Private constants ---------------------------------------------------------*/ |
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311 | /** @addtogroup DAC_Private_Constants DAC Private Constants |
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312 | * @{ |
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313 | */ |
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314 | #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */ |
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315 | |
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316 | /** |
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317 | * @} |
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318 | */ |
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319 | |
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320 | /* Private macro -------------------------------------------------------------*/ |
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321 | /* Private variables ---------------------------------------------------------*/ |
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322 | /* Private function prototypes -----------------------------------------------*/ |
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323 | /* Exported functions -------------------------------------------------------*/ |
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324 | |
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325 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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326 | * @{ |
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327 | */ |
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328 | |
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329 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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330 | * @brief Initialization and Configuration functions |
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331 | * |
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332 | @verbatim |
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333 | ============================================================================== |
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334 | ##### Initialization and de-initialization functions ##### |
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335 | ============================================================================== |
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336 | [..] This section provides functions allowing to: |
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337 | (+) Initialize and configure the DAC. |
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338 | (+) De-initialize the DAC. |
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339 | |
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340 | @endverbatim |
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341 | * @{ |
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342 | */ |
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343 | |
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344 | /** |
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345 | * @brief Initialize the DAC peripheral according to the specified parameters |
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346 | * in the DAC_InitStruct and initialize the associated handle. |
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347 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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348 | * the configuration information for the specified DAC. |
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349 | * @retval HAL status |
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350 | */ |
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351 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
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352 | { |
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353 | /* Check DAC handle */ |
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354 | if (hdac == NULL) |
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355 | { |
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356 | return HAL_ERROR; |
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357 | } |
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358 | /* Check the parameters */ |
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359 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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360 | |
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361 | if (hdac->State == HAL_DAC_STATE_RESET) |
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362 | { |
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363 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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364 | /* Init the DAC Callback settings */ |
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365 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
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366 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
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367 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
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368 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
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369 | |
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370 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
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371 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
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372 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
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373 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
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374 | |
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375 | if (hdac->MspInitCallback == NULL) |
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376 | { |
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377 | hdac->MspInitCallback = HAL_DAC_MspInit; |
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378 | } |
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379 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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380 | |
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381 | /* Allocate lock resource and initialize it */ |
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382 | hdac->Lock = HAL_UNLOCKED; |
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383 | |
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384 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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385 | /* Init the low level hardware */ |
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386 | hdac->MspInitCallback(hdac); |
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387 | #else |
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388 | /* Init the low level hardware */ |
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389 | HAL_DAC_MspInit(hdac); |
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390 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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391 | } |
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392 | |
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393 | /* Initialize the DAC state*/ |
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394 | hdac->State = HAL_DAC_STATE_BUSY; |
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395 | |
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396 | /* Set DAC error code to none */ |
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397 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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398 | |
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399 | /* Initialize the DAC state*/ |
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400 | hdac->State = HAL_DAC_STATE_READY; |
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401 | |
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402 | /* Return function status */ |
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403 | return HAL_OK; |
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404 | } |
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405 | |
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406 | /** |
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407 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
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408 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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409 | * the configuration information for the specified DAC. |
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410 | * @retval HAL status |
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411 | */ |
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412 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
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413 | { |
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414 | /* Check DAC handle */ |
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415 | if (hdac == NULL) |
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416 | { |
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417 | return HAL_ERROR; |
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418 | } |
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419 | |
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420 | /* Check the parameters */ |
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421 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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422 | |
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423 | /* Change DAC state */ |
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424 | hdac->State = HAL_DAC_STATE_BUSY; |
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425 | |
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426 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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427 | if (hdac->MspDeInitCallback == NULL) |
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428 | { |
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429 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
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430 | } |
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431 | /* DeInit the low level hardware */ |
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432 | hdac->MspDeInitCallback(hdac); |
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433 | #else |
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434 | /* DeInit the low level hardware */ |
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435 | HAL_DAC_MspDeInit(hdac); |
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436 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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437 | |
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438 | /* Set DAC error code to none */ |
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439 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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440 | |
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441 | /* Change DAC state */ |
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442 | hdac->State = HAL_DAC_STATE_RESET; |
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443 | |
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444 | /* Release Lock */ |
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445 | __HAL_UNLOCK(hdac); |
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446 | |
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447 | /* Return function status */ |
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448 | return HAL_OK; |
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449 | } |
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450 | |
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451 | /** |
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452 | * @brief Initialize the DAC MSP. |
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453 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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454 | * the configuration information for the specified DAC. |
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455 | * @retval None |
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456 | */ |
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457 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
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458 | { |
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459 | /* Prevent unused argument(s) compilation warning */ |
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460 | UNUSED(hdac); |
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461 | |
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462 | /* NOTE : This function should not be modified, when the callback is needed, |
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463 | the HAL_DAC_MspInit could be implemented in the user file |
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464 | */ |
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465 | } |
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466 | |
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467 | /** |
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468 | * @brief DeInitialize the DAC MSP. |
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469 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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470 | * the configuration information for the specified DAC. |
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471 | * @retval None |
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472 | */ |
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473 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
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474 | { |
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475 | /* Prevent unused argument(s) compilation warning */ |
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476 | UNUSED(hdac); |
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477 | |
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478 | /* NOTE : This function should not be modified, when the callback is needed, |
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479 | the HAL_DAC_MspDeInit could be implemented in the user file |
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480 | */ |
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481 | } |
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482 | |
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483 | /** |
---|
484 | * @} |
---|
485 | */ |
---|
486 | |
---|
487 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
---|
488 | * @brief IO operation functions |
---|
489 | * |
---|
490 | @verbatim |
---|
491 | ============================================================================== |
---|
492 | ##### IO operation functions ##### |
---|
493 | ============================================================================== |
---|
494 | [..] This section provides functions allowing to: |
---|
495 | (+) Start conversion. |
---|
496 | (+) Stop conversion. |
---|
497 | (+) Start conversion and enable DMA transfer. |
---|
498 | (+) Stop conversion and disable DMA transfer. |
---|
499 | (+) Get result of conversion. |
---|
500 | |
---|
501 | @endverbatim |
---|
502 | * @{ |
---|
503 | */ |
---|
504 | |
---|
505 | /** |
---|
506 | * @brief Enables DAC and starts conversion of channel. |
---|
507 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
508 | * the configuration information for the specified DAC. |
---|
509 | * @param Channel The selected DAC channel. |
---|
510 | * This parameter can be one of the following values: |
---|
511 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
512 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
513 | * @retval HAL status |
---|
514 | */ |
---|
515 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
---|
516 | { |
---|
517 | /* Check the parameters */ |
---|
518 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
519 | |
---|
520 | /* Process locked */ |
---|
521 | __HAL_LOCK(hdac); |
---|
522 | |
---|
523 | /* Change DAC state */ |
---|
524 | hdac->State = HAL_DAC_STATE_BUSY; |
---|
525 | |
---|
526 | /* Enable the Peripheral */ |
---|
527 | __HAL_DAC_ENABLE(hdac, Channel); |
---|
528 | |
---|
529 | if (Channel == DAC_CHANNEL_1) |
---|
530 | { |
---|
531 | /* Check if software trigger enabled */ |
---|
532 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
---|
533 | { |
---|
534 | /* Enable the selected DAC software conversion */ |
---|
535 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
---|
536 | } |
---|
537 | } |
---|
538 | else |
---|
539 | { |
---|
540 | /* Check if software trigger enabled */ |
---|
541 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << Channel)) |
---|
542 | { |
---|
543 | /* Enable the selected DAC software conversion*/ |
---|
544 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
---|
545 | } |
---|
546 | } |
---|
547 | |
---|
548 | /* Change DAC state */ |
---|
549 | hdac->State = HAL_DAC_STATE_READY; |
---|
550 | |
---|
551 | /* Process unlocked */ |
---|
552 | __HAL_UNLOCK(hdac); |
---|
553 | |
---|
554 | /* Return function status */ |
---|
555 | return HAL_OK; |
---|
556 | } |
---|
557 | |
---|
558 | /** |
---|
559 | * @brief Disables DAC and stop conversion of channel. |
---|
560 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
561 | * the configuration information for the specified DAC. |
---|
562 | * @param Channel The selected DAC channel. |
---|
563 | * This parameter can be one of the following values: |
---|
564 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
565 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
566 | * @retval HAL status |
---|
567 | */ |
---|
568 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
---|
569 | { |
---|
570 | /* Check the parameters */ |
---|
571 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
572 | |
---|
573 | /* Disable the Peripheral */ |
---|
574 | __HAL_DAC_DISABLE(hdac, Channel); |
---|
575 | |
---|
576 | /* Change DAC state */ |
---|
577 | hdac->State = HAL_DAC_STATE_READY; |
---|
578 | |
---|
579 | /* Return function status */ |
---|
580 | return HAL_OK; |
---|
581 | } |
---|
582 | |
---|
583 | /** |
---|
584 | * @brief Enables DAC and starts conversion of channel. |
---|
585 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
586 | * the configuration information for the specified DAC. |
---|
587 | * @param Channel The selected DAC channel. |
---|
588 | * This parameter can be one of the following values: |
---|
589 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
590 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
591 | * @param pData The destination peripheral Buffer address. |
---|
592 | * @param Length The length of data to be transferred from memory to DAC peripheral |
---|
593 | * @param Alignment Specifies the data alignment for DAC channel. |
---|
594 | * This parameter can be one of the following values: |
---|
595 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
---|
596 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
---|
597 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
---|
598 | * @retval HAL status |
---|
599 | */ |
---|
600 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
---|
601 | uint32_t Alignment) |
---|
602 | { |
---|
603 | HAL_StatusTypeDef status; |
---|
604 | uint32_t tmpreg = 0U; |
---|
605 | |
---|
606 | /* Check the parameters */ |
---|
607 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
608 | assert_param(IS_DAC_ALIGN(Alignment)); |
---|
609 | |
---|
610 | /* Process locked */ |
---|
611 | __HAL_LOCK(hdac); |
---|
612 | |
---|
613 | /* Change DAC state */ |
---|
614 | hdac->State = HAL_DAC_STATE_BUSY; |
---|
615 | |
---|
616 | if (Channel == DAC_CHANNEL_1) |
---|
617 | { |
---|
618 | /* Set the DMA transfer complete callback for channel1 */ |
---|
619 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
---|
620 | |
---|
621 | /* Set the DMA half transfer complete callback for channel1 */ |
---|
622 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
---|
623 | |
---|
624 | /* Set the DMA error callback for channel1 */ |
---|
625 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
---|
626 | |
---|
627 | /* Enable the selected DAC channel1 DMA request */ |
---|
628 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
---|
629 | |
---|
630 | /* Case of use of channel 1 */ |
---|
631 | switch (Alignment) |
---|
632 | { |
---|
633 | case DAC_ALIGN_12B_R: |
---|
634 | /* Get DHR12R1 address */ |
---|
635 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
---|
636 | break; |
---|
637 | case DAC_ALIGN_12B_L: |
---|
638 | /* Get DHR12L1 address */ |
---|
639 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
---|
640 | break; |
---|
641 | case DAC_ALIGN_8B_R: |
---|
642 | /* Get DHR8R1 address */ |
---|
643 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
---|
644 | break; |
---|
645 | default: |
---|
646 | break; |
---|
647 | } |
---|
648 | } |
---|
649 | else |
---|
650 | { |
---|
651 | /* Set the DMA transfer complete callback for channel2 */ |
---|
652 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
---|
653 | |
---|
654 | /* Set the DMA half transfer complete callback for channel2 */ |
---|
655 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
---|
656 | |
---|
657 | /* Set the DMA error callback for channel2 */ |
---|
658 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
---|
659 | |
---|
660 | /* Enable the selected DAC channel2 DMA request */ |
---|
661 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
---|
662 | |
---|
663 | /* Case of use of channel 2 */ |
---|
664 | switch (Alignment) |
---|
665 | { |
---|
666 | case DAC_ALIGN_12B_R: |
---|
667 | /* Get DHR12R2 address */ |
---|
668 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
---|
669 | break; |
---|
670 | case DAC_ALIGN_12B_L: |
---|
671 | /* Get DHR12L2 address */ |
---|
672 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
---|
673 | break; |
---|
674 | case DAC_ALIGN_8B_R: |
---|
675 | /* Get DHR8R2 address */ |
---|
676 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
---|
677 | break; |
---|
678 | default: |
---|
679 | break; |
---|
680 | } |
---|
681 | } |
---|
682 | |
---|
683 | /* Enable the DMA channel */ |
---|
684 | if (Channel == DAC_CHANNEL_1) |
---|
685 | { |
---|
686 | /* Enable the DAC DMA underrun interrupt */ |
---|
687 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
---|
688 | |
---|
689 | /* Enable the DMA channel */ |
---|
690 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
---|
691 | } |
---|
692 | else |
---|
693 | { |
---|
694 | /* Enable the DAC DMA underrun interrupt */ |
---|
695 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
---|
696 | |
---|
697 | /* Enable the DMA channel */ |
---|
698 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
---|
699 | } |
---|
700 | |
---|
701 | /* Process Unlocked */ |
---|
702 | __HAL_UNLOCK(hdac); |
---|
703 | |
---|
704 | if (status == HAL_OK) |
---|
705 | { |
---|
706 | /* Enable the Peripheral */ |
---|
707 | __HAL_DAC_ENABLE(hdac, Channel); |
---|
708 | } |
---|
709 | else |
---|
710 | { |
---|
711 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
---|
712 | } |
---|
713 | |
---|
714 | /* Return function status */ |
---|
715 | return status; |
---|
716 | } |
---|
717 | |
---|
718 | /** |
---|
719 | * @brief Disables DAC and stop conversion of channel. |
---|
720 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
721 | * the configuration information for the specified DAC. |
---|
722 | * @param Channel The selected DAC channel. |
---|
723 | * This parameter can be one of the following values: |
---|
724 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
725 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
726 | * @retval HAL status |
---|
727 | */ |
---|
728 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
---|
729 | { |
---|
730 | HAL_StatusTypeDef status; |
---|
731 | |
---|
732 | /* Check the parameters */ |
---|
733 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
734 | |
---|
735 | /* Disable the selected DAC channel DMA request */ |
---|
736 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
---|
737 | |
---|
738 | /* Disable the Peripheral */ |
---|
739 | __HAL_DAC_DISABLE(hdac, Channel); |
---|
740 | |
---|
741 | /* Disable the DMA channel */ |
---|
742 | |
---|
743 | /* Channel1 is used */ |
---|
744 | if (Channel == DAC_CHANNEL_1) |
---|
745 | { |
---|
746 | /* Disable the DMA channel */ |
---|
747 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
---|
748 | |
---|
749 | /* Disable the DAC DMA underrun interrupt */ |
---|
750 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
---|
751 | } |
---|
752 | else /* Channel2 is used for */ |
---|
753 | { |
---|
754 | /* Disable the DMA channel */ |
---|
755 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
---|
756 | |
---|
757 | /* Disable the DAC DMA underrun interrupt */ |
---|
758 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
---|
759 | } |
---|
760 | |
---|
761 | /* Check if DMA Channel effectively disabled */ |
---|
762 | if (status != HAL_OK) |
---|
763 | { |
---|
764 | /* Update DAC state machine to error */ |
---|
765 | hdac->State = HAL_DAC_STATE_ERROR; |
---|
766 | } |
---|
767 | else |
---|
768 | { |
---|
769 | /* Change DAC state */ |
---|
770 | hdac->State = HAL_DAC_STATE_READY; |
---|
771 | } |
---|
772 | |
---|
773 | /* Return function status */ |
---|
774 | return status; |
---|
775 | } |
---|
776 | |
---|
777 | /** |
---|
778 | * @brief Handles DAC interrupt request |
---|
779 | * This function uses the interruption of DMA |
---|
780 | * underrun. |
---|
781 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
782 | * the configuration information for the specified DAC. |
---|
783 | * @retval None |
---|
784 | */ |
---|
785 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
---|
786 | { |
---|
787 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
---|
788 | { |
---|
789 | /* Check underrun flag of DAC channel 1 */ |
---|
790 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
---|
791 | { |
---|
792 | /* Change DAC state to error state */ |
---|
793 | hdac->State = HAL_DAC_STATE_ERROR; |
---|
794 | |
---|
795 | /* Set DAC error code to chanel1 DMA underrun error */ |
---|
796 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
---|
797 | |
---|
798 | /* Clear the underrun flag */ |
---|
799 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
---|
800 | |
---|
801 | /* Disable the selected DAC channel1 DMA request */ |
---|
802 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
---|
803 | |
---|
804 | /* Error callback */ |
---|
805 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
---|
806 | hdac->DMAUnderrunCallbackCh1(hdac); |
---|
807 | #else |
---|
808 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
---|
809 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
---|
810 | } |
---|
811 | } |
---|
812 | |
---|
813 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
---|
814 | { |
---|
815 | /* Check underrun flag of DAC channel 2 */ |
---|
816 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
---|
817 | { |
---|
818 | /* Change DAC state to error state */ |
---|
819 | hdac->State = HAL_DAC_STATE_ERROR; |
---|
820 | |
---|
821 | /* Set DAC error code to channel2 DMA underrun error */ |
---|
822 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
---|
823 | |
---|
824 | /* Clear the underrun flag */ |
---|
825 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
---|
826 | |
---|
827 | /* Disable the selected DAC channel2 DMA request */ |
---|
828 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
---|
829 | |
---|
830 | /* Error callback */ |
---|
831 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
---|
832 | hdac->DMAUnderrunCallbackCh2(hdac); |
---|
833 | #else |
---|
834 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
---|
835 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
---|
836 | } |
---|
837 | } |
---|
838 | } |
---|
839 | |
---|
840 | /** |
---|
841 | * @brief Set the specified data holding register value for DAC channel. |
---|
842 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
843 | * the configuration information for the specified DAC. |
---|
844 | * @param Channel The selected DAC channel. |
---|
845 | * This parameter can be one of the following values: |
---|
846 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
847 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
848 | * @param Alignment Specifies the data alignment. |
---|
849 | * This parameter can be one of the following values: |
---|
850 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
---|
851 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
---|
852 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
---|
853 | * @param Data Data to be loaded in the selected data holding register. |
---|
854 | * @retval HAL status |
---|
855 | */ |
---|
856 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
---|
857 | { |
---|
858 | __IO uint32_t tmp = 0; |
---|
859 | |
---|
860 | /* Check the parameters */ |
---|
861 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
862 | assert_param(IS_DAC_ALIGN(Alignment)); |
---|
863 | assert_param(IS_DAC_DATA(Data)); |
---|
864 | |
---|
865 | tmp = (uint32_t)hdac->Instance; |
---|
866 | if (Channel == DAC_CHANNEL_1) |
---|
867 | { |
---|
868 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
---|
869 | } |
---|
870 | else |
---|
871 | { |
---|
872 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
---|
873 | } |
---|
874 | |
---|
875 | /* Set the DAC channel selected data holding register */ |
---|
876 | *(__IO uint32_t *) tmp = Data; |
---|
877 | |
---|
878 | /* Return function status */ |
---|
879 | return HAL_OK; |
---|
880 | } |
---|
881 | |
---|
882 | /** |
---|
883 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
---|
884 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
885 | * the configuration information for the specified DAC. |
---|
886 | * @retval None |
---|
887 | */ |
---|
888 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
---|
889 | { |
---|
890 | /* Prevent unused argument(s) compilation warning */ |
---|
891 | UNUSED(hdac); |
---|
892 | |
---|
893 | /* NOTE : This function should not be modified, when the callback is needed, |
---|
894 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
---|
895 | */ |
---|
896 | } |
---|
897 | |
---|
898 | /** |
---|
899 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
---|
900 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
901 | * the configuration information for the specified DAC. |
---|
902 | * @retval None |
---|
903 | */ |
---|
904 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
---|
905 | { |
---|
906 | /* Prevent unused argument(s) compilation warning */ |
---|
907 | UNUSED(hdac); |
---|
908 | |
---|
909 | /* NOTE : This function should not be modified, when the callback is needed, |
---|
910 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
---|
911 | */ |
---|
912 | } |
---|
913 | |
---|
914 | /** |
---|
915 | * @brief Error DAC callback for Channel1. |
---|
916 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
917 | * the configuration information for the specified DAC. |
---|
918 | * @retval None |
---|
919 | */ |
---|
920 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
---|
921 | { |
---|
922 | /* Prevent unused argument(s) compilation warning */ |
---|
923 | UNUSED(hdac); |
---|
924 | |
---|
925 | /* NOTE : This function should not be modified, when the callback is needed, |
---|
926 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
---|
927 | */ |
---|
928 | } |
---|
929 | |
---|
930 | /** |
---|
931 | * @brief DMA underrun DAC callback for channel1. |
---|
932 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
933 | * the configuration information for the specified DAC. |
---|
934 | * @retval None |
---|
935 | */ |
---|
936 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
---|
937 | { |
---|
938 | /* Prevent unused argument(s) compilation warning */ |
---|
939 | UNUSED(hdac); |
---|
940 | |
---|
941 | /* NOTE : This function should not be modified, when the callback is needed, |
---|
942 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
---|
943 | */ |
---|
944 | } |
---|
945 | |
---|
946 | /** |
---|
947 | * @} |
---|
948 | */ |
---|
949 | |
---|
950 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
---|
951 | * @brief Peripheral Control functions |
---|
952 | * |
---|
953 | @verbatim |
---|
954 | ============================================================================== |
---|
955 | ##### Peripheral Control functions ##### |
---|
956 | ============================================================================== |
---|
957 | [..] This section provides functions allowing to: |
---|
958 | (+) Configure channels. |
---|
959 | (+) Set the specified data holding register value for DAC channel. |
---|
960 | |
---|
961 | @endverbatim |
---|
962 | * @{ |
---|
963 | */ |
---|
964 | |
---|
965 | /** |
---|
966 | * @brief Returns the last data output value of the selected DAC channel. |
---|
967 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
968 | * the configuration information for the specified DAC. |
---|
969 | * @param Channel The selected DAC channel. |
---|
970 | * This parameter can be one of the following values: |
---|
971 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
972 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
973 | * @retval The selected DAC channel data output value. |
---|
974 | */ |
---|
975 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) |
---|
976 | { |
---|
977 | /* Check the parameters */ |
---|
978 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
979 | |
---|
980 | /* Returns the DAC channel data output register value */ |
---|
981 | if (Channel == DAC_CHANNEL_1) |
---|
982 | { |
---|
983 | return hdac->Instance->DOR1; |
---|
984 | } |
---|
985 | else |
---|
986 | { |
---|
987 | return hdac->Instance->DOR2; |
---|
988 | } |
---|
989 | } |
---|
990 | |
---|
991 | /** |
---|
992 | * @brief Configures the selected DAC channel. |
---|
993 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
994 | * the configuration information for the specified DAC. |
---|
995 | * @param sConfig DAC configuration structure. |
---|
996 | * @param Channel The selected DAC channel. |
---|
997 | * This parameter can be one of the following values: |
---|
998 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
---|
999 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
---|
1000 | * @retval HAL status |
---|
1001 | */ |
---|
1002 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
---|
1003 | { |
---|
1004 | uint32_t tmpreg1; |
---|
1005 | uint32_t tmpreg2; |
---|
1006 | uint32_t tickstart = 0U; |
---|
1007 | |
---|
1008 | /* Check the DAC parameters */ |
---|
1009 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
---|
1010 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
---|
1011 | assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral)); |
---|
1012 | assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming)); |
---|
1013 | if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER) |
---|
1014 | { |
---|
1015 | assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue)); |
---|
1016 | } |
---|
1017 | assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold)); |
---|
1018 | if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE) |
---|
1019 | { |
---|
1020 | assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime)); |
---|
1021 | assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)); |
---|
1022 | assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)); |
---|
1023 | } |
---|
1024 | assert_param(IS_DAC_CHANNEL(Channel)); |
---|
1025 | |
---|
1026 | /* Process locked */ |
---|
1027 | __HAL_LOCK(hdac); |
---|
1028 | |
---|
1029 | /* Change DAC state */ |
---|
1030 | hdac->State = HAL_DAC_STATE_BUSY; |
---|
1031 | |
---|
1032 | if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE) |
---|
1033 | /* Sample on old configuration */ |
---|
1034 | { |
---|
1035 | /* SampleTime */ |
---|
1036 | if (Channel == DAC_CHANNEL_1) |
---|
1037 | { |
---|
1038 | /* Get timeout */ |
---|
1039 | tickstart = HAL_GetTick(); |
---|
1040 | |
---|
1041 | /* SHSR1 can be written when BWST1 is cleared */ |
---|
1042 | while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL) |
---|
1043 | { |
---|
1044 | /* Check for the Timeout */ |
---|
1045 | if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) |
---|
1046 | { |
---|
1047 | /* Update error code */ |
---|
1048 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); |
---|
1049 | |
---|
1050 | /* Change the DMA state */ |
---|
1051 | hdac->State = HAL_DAC_STATE_TIMEOUT; |
---|
1052 | |
---|
1053 | return HAL_TIMEOUT; |
---|
1054 | } |
---|
1055 | } |
---|
1056 | HAL_Delay(1); |
---|
1057 | hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; |
---|
1058 | } |
---|
1059 | else /* Channel 2 */ |
---|
1060 | { |
---|
1061 | /* SHSR2 can be written when BWST2 is cleared */ |
---|
1062 | |
---|
1063 | while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL) |
---|
1064 | { |
---|
1065 | /* Check for the Timeout */ |
---|
1066 | if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) |
---|
1067 | { |
---|
1068 | /* Update error code */ |
---|
1069 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); |
---|
1070 | |
---|
1071 | /* Change the DMA state */ |
---|
1072 | hdac->State = HAL_DAC_STATE_TIMEOUT; |
---|
1073 | |
---|
1074 | return HAL_TIMEOUT; |
---|
1075 | } |
---|
1076 | } |
---|
1077 | HAL_Delay(1U); |
---|
1078 | hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; |
---|
1079 | } |
---|
1080 | |
---|
1081 | /* HoldTime */ |
---|
1082 | MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL)); |
---|
1083 | /* RefreshTime */ |
---|
1084 | MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL)); |
---|
1085 | } |
---|
1086 | |
---|
1087 | if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER) |
---|
1088 | /* USER TRIMMING */ |
---|
1089 | { |
---|
1090 | /* Get the DAC CCR value */ |
---|
1091 | tmpreg1 = hdac->Instance->CCR; |
---|
1092 | /* Clear trimming value */ |
---|
1093 | tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL)); |
---|
1094 | /* Configure for the selected trimming offset */ |
---|
1095 | tmpreg2 = sConfig->DAC_TrimmingValue; |
---|
1096 | /* Calculate CCR register value depending on DAC_Channel */ |
---|
1097 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
---|
1098 | /* Write to DAC CCR */ |
---|
1099 | hdac->Instance->CCR = tmpreg1; |
---|
1100 | } |
---|
1101 | /* else factory trimming is used (factory setting are available at reset)*/ |
---|
1102 | /* SW Nothing has nothing to do */ |
---|
1103 | |
---|
1104 | /* Get the DAC MCR value */ |
---|
1105 | tmpreg1 = hdac->Instance->MCR; |
---|
1106 | /* Clear DAC_MCR_MODEx bits */ |
---|
1107 | tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL)); |
---|
1108 | /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */ |
---|
1109 | tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral); |
---|
1110 | /* Calculate MCR register value depending on DAC_Channel */ |
---|
1111 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
---|
1112 | /* Write to DAC MCR */ |
---|
1113 | hdac->Instance->MCR = tmpreg1; |
---|
1114 | |
---|
1115 | /* DAC in normal operating mode hence clear DAC_CR_CENx bit */ |
---|
1116 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL)); |
---|
1117 | |
---|
1118 | /* Get the DAC CR value */ |
---|
1119 | tmpreg1 = hdac->Instance->CR; |
---|
1120 | /* Clear TENx, TSELx, WAVEx and MAMPx bits */ |
---|
1121 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL)); |
---|
1122 | /* Configure for the selected DAC channel: trigger */ |
---|
1123 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
---|
1124 | tmpreg2 = sConfig->DAC_Trigger; |
---|
1125 | /* Calculate CR register value depending on DAC_Channel */ |
---|
1126 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
---|
1127 | /* Write to DAC CR */ |
---|
1128 | hdac->Instance->CR = tmpreg1; |
---|
1129 | /* Disable wave generation */ |
---|
1130 | hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL)); |
---|
1131 | |
---|
1132 | /* Change DAC state */ |
---|
1133 | hdac->State = HAL_DAC_STATE_READY; |
---|
1134 | |
---|
1135 | /* Process unlocked */ |
---|
1136 | __HAL_UNLOCK(hdac); |
---|
1137 | |
---|
1138 | /* Return function status */ |
---|
1139 | return HAL_OK; |
---|
1140 | } |
---|
1141 | |
---|
1142 | /** |
---|
1143 | * @} |
---|
1144 | */ |
---|
1145 | |
---|
1146 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
---|
1147 | * @brief Peripheral State and Errors functions |
---|
1148 | * |
---|
1149 | @verbatim |
---|
1150 | ============================================================================== |
---|
1151 | ##### Peripheral State and Errors functions ##### |
---|
1152 | ============================================================================== |
---|
1153 | [..] |
---|
1154 | This subsection provides functions allowing to |
---|
1155 | (+) Check the DAC state. |
---|
1156 | (+) Check the DAC Errors. |
---|
1157 | |
---|
1158 | @endverbatim |
---|
1159 | * @{ |
---|
1160 | */ |
---|
1161 | |
---|
1162 | /** |
---|
1163 | * @brief return the DAC handle state |
---|
1164 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
1165 | * the configuration information for the specified DAC. |
---|
1166 | * @retval HAL state |
---|
1167 | */ |
---|
1168 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) |
---|
1169 | { |
---|
1170 | /* Return DAC handle state */ |
---|
1171 | return hdac->State; |
---|
1172 | } |
---|
1173 | |
---|
1174 | |
---|
1175 | /** |
---|
1176 | * @brief Return the DAC error code |
---|
1177 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
---|
1178 | * the configuration information for the specified DAC. |
---|
1179 | * @retval DAC Error Code |
---|
1180 | */ |
---|
1181 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
---|
1182 | { |
---|
1183 | return hdac->ErrorCode; |
---|
1184 | } |
---|
1185 | |
---|
1186 | /** |
---|
1187 | * @} |
---|
1188 | */ |
---|
1189 | |
---|
1190 | /** |
---|
1191 | * @} |
---|
1192 | */ |
---|
1193 | |
---|
1194 | /** @addtogroup DAC_Exported_Functions |
---|
1195 | * @{ |
---|
1196 | */ |
---|
1197 | |
---|
1198 | /** @addtogroup DAC_Exported_Functions_Group1 |
---|
1199 | * @{ |
---|
1200 | */ |
---|
1201 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
---|
1202 | /** |
---|
1203 | * @brief Register a User DAC Callback |
---|
1204 | * To be used instead of the weak (surcharged) predefined callback |
---|
1205 | * @param hdac DAC handle |
---|
1206 | * @param CallbackID ID of the callback to be registered |
---|
1207 | * This parameter can be one of the following values: |
---|
1208 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
---|
1209 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
---|
1210 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
---|
1211 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
---|
1212 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
---|
1213 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
---|
1214 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
---|
1215 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
---|
1216 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
---|
1217 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
---|
1218 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
---|
1219 | * |
---|
1220 | * @param pCallback pointer to the Callback function |
---|
1221 | * @retval status |
---|
1222 | */ |
---|
1223 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
---|
1224 | pDAC_CallbackTypeDef pCallback) |
---|
1225 | { |
---|
1226 | HAL_StatusTypeDef status = HAL_OK; |
---|
1227 | |
---|
1228 | if (pCallback == NULL) |
---|
1229 | { |
---|
1230 | /* Update the error code */ |
---|
1231 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1232 | return HAL_ERROR; |
---|
1233 | } |
---|
1234 | |
---|
1235 | /* Process locked */ |
---|
1236 | __HAL_LOCK(hdac); |
---|
1237 | |
---|
1238 | if (hdac->State == HAL_DAC_STATE_READY) |
---|
1239 | { |
---|
1240 | switch (CallbackID) |
---|
1241 | { |
---|
1242 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
---|
1243 | hdac->ConvCpltCallbackCh1 = pCallback; |
---|
1244 | break; |
---|
1245 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
---|
1246 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
---|
1247 | break; |
---|
1248 | case HAL_DAC_CH1_ERROR_ID : |
---|
1249 | hdac->ErrorCallbackCh1 = pCallback; |
---|
1250 | break; |
---|
1251 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
---|
1252 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
---|
1253 | break; |
---|
1254 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
---|
1255 | hdac->ConvCpltCallbackCh2 = pCallback; |
---|
1256 | break; |
---|
1257 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
---|
1258 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
---|
1259 | break; |
---|
1260 | case HAL_DAC_CH2_ERROR_ID : |
---|
1261 | hdac->ErrorCallbackCh2 = pCallback; |
---|
1262 | break; |
---|
1263 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
---|
1264 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
---|
1265 | break; |
---|
1266 | case HAL_DAC_MSPINIT_CB_ID : |
---|
1267 | hdac->MspInitCallback = pCallback; |
---|
1268 | break; |
---|
1269 | case HAL_DAC_MSPDEINIT_CB_ID : |
---|
1270 | hdac->MspDeInitCallback = pCallback; |
---|
1271 | break; |
---|
1272 | default : |
---|
1273 | /* Update the error code */ |
---|
1274 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1275 | /* update return status */ |
---|
1276 | status = HAL_ERROR; |
---|
1277 | break; |
---|
1278 | } |
---|
1279 | } |
---|
1280 | else if (hdac->State == HAL_DAC_STATE_RESET) |
---|
1281 | { |
---|
1282 | switch (CallbackID) |
---|
1283 | { |
---|
1284 | case HAL_DAC_MSPINIT_CB_ID : |
---|
1285 | hdac->MspInitCallback = pCallback; |
---|
1286 | break; |
---|
1287 | case HAL_DAC_MSPDEINIT_CB_ID : |
---|
1288 | hdac->MspDeInitCallback = pCallback; |
---|
1289 | break; |
---|
1290 | default : |
---|
1291 | /* Update the error code */ |
---|
1292 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1293 | /* update return status */ |
---|
1294 | status = HAL_ERROR; |
---|
1295 | break; |
---|
1296 | } |
---|
1297 | } |
---|
1298 | else |
---|
1299 | { |
---|
1300 | /* Update the error code */ |
---|
1301 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1302 | /* update return status */ |
---|
1303 | status = HAL_ERROR; |
---|
1304 | } |
---|
1305 | |
---|
1306 | /* Release Lock */ |
---|
1307 | __HAL_UNLOCK(hdac); |
---|
1308 | return status; |
---|
1309 | } |
---|
1310 | |
---|
1311 | /** |
---|
1312 | * @brief Unregister a User DAC Callback |
---|
1313 | * DAC Callback is redirected to the weak (surcharged) predefined callback |
---|
1314 | * @param hdac DAC handle |
---|
1315 | * @param CallbackID ID of the callback to be unregistered |
---|
1316 | * This parameter can be one of the following values: |
---|
1317 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 tranfer Complete Callback ID |
---|
1318 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
---|
1319 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
---|
1320 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
---|
1321 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
---|
1322 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
---|
1323 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
---|
1324 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
---|
1325 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
---|
1326 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
---|
1327 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
---|
1328 | * @retval status |
---|
1329 | */ |
---|
1330 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
---|
1331 | { |
---|
1332 | HAL_StatusTypeDef status = HAL_OK; |
---|
1333 | |
---|
1334 | /* Process locked */ |
---|
1335 | __HAL_LOCK(hdac); |
---|
1336 | |
---|
1337 | if (hdac->State == HAL_DAC_STATE_READY) |
---|
1338 | { |
---|
1339 | switch (CallbackID) |
---|
1340 | { |
---|
1341 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
---|
1342 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
---|
1343 | break; |
---|
1344 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
---|
1345 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
---|
1346 | break; |
---|
1347 | case HAL_DAC_CH1_ERROR_ID : |
---|
1348 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
---|
1349 | break; |
---|
1350 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
---|
1351 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
---|
1352 | break; |
---|
1353 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
---|
1354 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
---|
1355 | break; |
---|
1356 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
---|
1357 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
---|
1358 | break; |
---|
1359 | case HAL_DAC_CH2_ERROR_ID : |
---|
1360 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
---|
1361 | break; |
---|
1362 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
---|
1363 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
---|
1364 | break; |
---|
1365 | case HAL_DAC_MSPINIT_CB_ID : |
---|
1366 | hdac->MspInitCallback = HAL_DAC_MspInit; |
---|
1367 | break; |
---|
1368 | case HAL_DAC_MSPDEINIT_CB_ID : |
---|
1369 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
---|
1370 | break; |
---|
1371 | case HAL_DAC_ALL_CB_ID : |
---|
1372 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
---|
1373 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
---|
1374 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
---|
1375 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
---|
1376 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
---|
1377 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
---|
1378 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
---|
1379 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
---|
1380 | hdac->MspInitCallback = HAL_DAC_MspInit; |
---|
1381 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
---|
1382 | break; |
---|
1383 | default : |
---|
1384 | /* Update the error code */ |
---|
1385 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1386 | /* update return status */ |
---|
1387 | status = HAL_ERROR; |
---|
1388 | break; |
---|
1389 | } |
---|
1390 | } |
---|
1391 | else if (hdac->State == HAL_DAC_STATE_RESET) |
---|
1392 | { |
---|
1393 | switch (CallbackID) |
---|
1394 | { |
---|
1395 | case HAL_DAC_MSPINIT_CB_ID : |
---|
1396 | hdac->MspInitCallback = HAL_DAC_MspInit; |
---|
1397 | break; |
---|
1398 | case HAL_DAC_MSPDEINIT_CB_ID : |
---|
1399 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
---|
1400 | break; |
---|
1401 | default : |
---|
1402 | /* Update the error code */ |
---|
1403 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1404 | /* update return status */ |
---|
1405 | status = HAL_ERROR; |
---|
1406 | break; |
---|
1407 | } |
---|
1408 | } |
---|
1409 | else |
---|
1410 | { |
---|
1411 | /* Update the error code */ |
---|
1412 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
---|
1413 | /* update return status */ |
---|
1414 | status = HAL_ERROR; |
---|
1415 | } |
---|
1416 | |
---|
1417 | /* Release Lock */ |
---|
1418 | __HAL_UNLOCK(hdac); |
---|
1419 | return status; |
---|
1420 | } |
---|
1421 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
---|
1422 | |
---|
1423 | /** |
---|
1424 | * @} |
---|
1425 | */ |
---|
1426 | |
---|
1427 | /** |
---|
1428 | * @} |
---|
1429 | */ |
---|
1430 | |
---|
1431 | /** @addtogroup DAC_Private_Functions |
---|
1432 | * @{ |
---|
1433 | */ |
---|
1434 | |
---|
1435 | /** |
---|
1436 | * @brief DMA conversion complete callback. |
---|
1437 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
---|
1438 | * the configuration information for the specified DMA module. |
---|
1439 | * @retval None |
---|
1440 | */ |
---|
1441 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
---|
1442 | { |
---|
1443 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
---|
1444 | |
---|
1445 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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1446 | hdac->ConvCpltCallbackCh1(hdac); |
---|
1447 | #else |
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1448 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
---|
1449 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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1450 | |
---|
1451 | hdac->State = HAL_DAC_STATE_READY; |
---|
1452 | } |
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1453 | |
---|
1454 | /** |
---|
1455 | * @brief DMA half transfer complete callback. |
---|
1456 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
---|
1457 | * the configuration information for the specified DMA module. |
---|
1458 | * @retval None |
---|
1459 | */ |
---|
1460 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
---|
1461 | { |
---|
1462 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
---|
1463 | /* Conversion complete callback */ |
---|
1464 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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1465 | hdac->ConvHalfCpltCallbackCh1(hdac); |
---|
1466 | #else |
---|
1467 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
---|
1468 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
---|
1469 | } |
---|
1470 | |
---|
1471 | /** |
---|
1472 | * @brief DMA error callback |
---|
1473 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
---|
1474 | * the configuration information for the specified DMA module. |
---|
1475 | * @retval None |
---|
1476 | */ |
---|
1477 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
---|
1478 | { |
---|
1479 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
---|
1480 | |
---|
1481 | /* Set DAC error code to DMA error */ |
---|
1482 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
---|
1483 | |
---|
1484 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
---|
1485 | hdac->ErrorCallbackCh1(hdac); |
---|
1486 | #else |
---|
1487 | HAL_DAC_ErrorCallbackCh1(hdac); |
---|
1488 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
---|
1489 | |
---|
1490 | hdac->State = HAL_DAC_STATE_READY; |
---|
1491 | } |
---|
1492 | |
---|
1493 | /** |
---|
1494 | * @} |
---|
1495 | */ |
---|
1496 | |
---|
1497 | /** |
---|
1498 | * @} |
---|
1499 | */ |
---|
1500 | |
---|
1501 | #endif /* DAC1 */ |
---|
1502 | |
---|
1503 | #endif /* HAL_DAC_MODULE_ENABLED */ |
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1504 | |
---|
1505 | /** |
---|
1506 | * @} |
---|
1507 | */ |
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1508 | |
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1509 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
---|