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SEGGER_RTT_Conf.h @ 34

Last change on this file since 34 was 6, checked in by f.jahn, 7 months ago

File size: 18.1 KB

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1	/*********************************************************************
2	* SEGGER Microcontroller GmbH *
3	* The Embedded Experts *
4	**********************************************************************
5	* *
6	* (c) 2014 - 2019 SEGGER Microcontroller GmbH *
7	* *
8	* www.segger.com Support: support@segger.com *
9	* *
10	**********************************************************************
11	* *
12	* All rights reserved. *
13	* *
14	* Redistribution and use in source and binary forms, with or *
15	* without modification, are permitted provided that the following *
16	* conditions are met: *
17	* *
18	* - Redistributions of source code must retain the above copyright *
19	* notice, this list of conditions and the following disclaimer. *
20	* *
21	* - Neither the name of SEGGER Microcontroller GmbH *
22	* nor the names of its contributors may be used to endorse or *
23	* promote products derived from this software without specific *
24	* prior written permission. *
25	* *
26	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
27	* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
28	* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
29	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
30	* DISCLAIMED. *
31	* IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
32	* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
33	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
34	* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
35	* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
36	* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
37	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
38	* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
39	* DAMAGE. *
40	* *
41	**********************************************************************
42	---------------------------END-OF-HEADER------------------------------
43	File : SEGGER_RTT_Conf.h
44	Purpose : Implementation of SEGGER real-time transfer (RTT) which
45	allows real-time communication on targets which support
46	debugger memory accesses while the CPU is running.
47	Revision: $Rev: 12804 $
48
49	*/
50
51	#ifndef SEGGER_RTT_CONF_H
52	#define SEGGER_RTT_CONF_H
53
54	#ifdef __IAR_SYSTEMS_ICC__
55	#include <intrinsics.h>
56	#endif
57
58	/*********************************************************************
59	*
60	* Defines, configurable
61	*
62	**********************************************************************
63	*/
64
65	#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (2) // Max. number of up-buffers (T->H) available on this target (Default: 2)
66	#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (2) // Max. number of down-buffers (H->T) available on this target (Default: 2)
67
68	#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
69	#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
70
71	#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
72
73	#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
74
75	/*********************************************************************
76	*
77	* RTT memcpy configuration
78	*
79	* memcpy() is good for large amounts of data,
80	* but the overhead is big for small amounts, which are usually stored via RTT.
81	* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
82	*
83	* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
84	* This is may be required with memory access restrictions,
85	* such as on Cortex-A devices with MMU.
86	*/
87	#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
88	//
89	// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
90	//
91	//#if ((defined __SES_ARM) \|\| (defined __CROSSWORKS_ARM) \|\| (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
92	// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
93	//#endif
94
95	//
96	// Target is not allowed to perform other RTT operations while string still has not been stored completely.
97	// Otherwise we would probably end up with a mixed string in the buffer.
98	// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
99	//
100	// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
101	// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
102	// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
103	// (Higher priority = lower priority number)
104	// Default value for embOS: 128u
105	// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
106	// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
107	// or define SEGGER_RTT_LOCK() to completely disable interrupts.
108	//
109
110	#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
111
112	/*********************************************************************
113	*
114	* RTT lock configuration for SEGGER Embedded Studio,
115	* Rowley CrossStudio and GCC
116	*/
117	#if (defined __SES_ARM) \|\| (defined __CROSSWORKS_ARM) \|\| (defined __GNUC__) \|\| (defined __clang__)
118	#if (defined(__ARM_ARCH_6M__) \|\| defined(__ARM_ARCH_8M_BASE__))
119	#define SEGGER_RTT_LOCK() { \
120	unsigned int LockState; \
121	__asm volatile ("mrs %0, primask \n\t" \
122	"movs r1, $1 \n\t" \
123	"msr primask, r1 \n\t" \
124	: "=r" (LockState) \
125	: \
126	: "r1" \
127	);
128
129	#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
130	: \
131	: "r" (LockState) \
132	: \
133	); \
134	}
135	#elif (defined(__ARM_ARCH_7M__) \|\| defined(__ARM_ARCH_7EM__) \|\| defined(__ARM_ARCH_8M_MAIN__))
136	#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
137	#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
138	#endif
139	#define SEGGER_RTT_LOCK() { \
140	unsigned int LockState; \
141	__asm volatile ("mrs %0, basepri \n\t" \
142	"mov r1, %1 \n\t" \
143	"msr basepri, r1 \n\t" \
144	: "=r" (LockState) \
145	: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
146	: "r1" \
147	);
148
149	#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
150	: \
151	: "r" (LockState) \
152	: \
153	); \
154	}
155
156	#elif defined(__ARM_ARCH_7A__)
157	#define SEGGER_RTT_LOCK() { \
158	unsigned int LockState; \
159	__asm volatile ("mrs r1, CPSR \n\t" \
160	"mov %0, r1 \n\t" \
161	"orr r1, r1, #0xC0 \n\t" \
162	"msr CPSR_c, r1 \n\t" \
163	: "=r" (LockState) \
164	: \
165	: "r1" \
166	);
167
168	#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
169	"mrs r1, CPSR \n\t" \
170	"bic r1, r1, #0xC0 \n\t" \
171	"and r0, r0, #0xC0 \n\t" \
172	"orr r1, r1, r0 \n\t" \
173	"msr CPSR_c, r1 \n\t" \
174	: \
175	: "r" (LockState) \
176	: "r0", "r1" \
177	); \
178	}
179	#else
180	#define SEGGER_RTT_LOCK()
181	#define SEGGER_RTT_UNLOCK()
182	#endif
183	#endif
184
185	/*********************************************************************
186	*
187	* RTT lock configuration for IAR EWARM
188	*/
189	#ifdef __ICCARM__
190	#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
191	#define SEGGER_RTT_LOCK() { \
192	unsigned int LockState; \
193	LockState = __get_PRIMASK(); \
194	__set_PRIMASK(1);
195
196	#define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
197	}
198	#elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) \|\| (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
199	#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
200	#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
201	#endif
202	#define SEGGER_RTT_LOCK() { \
203	unsigned int LockState; \
204	LockState = __get_BASEPRI(); \
205	__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
206
207	#define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \
208	}
209	#endif
210	#endif
211
212	/*********************************************************************
213	*
214	* RTT lock configuration for IAR RX
215	*/
216	#ifdef __ICCRX__
217	#define SEGGER_RTT_LOCK() { \
218	unsigned long LockState; \
219	LockState = __get_interrupt_state(); \
220	__disable_interrupt();
221
222	#define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
223	}
224	#endif
225
226	/*********************************************************************
227	*
228	* RTT lock configuration for IAR RL78
229	*/
230	#ifdef __ICCRL78__
231	#define SEGGER_RTT_LOCK() { \
232	__istate_t LockState; \
233	LockState = __get_interrupt_state(); \
234	__disable_interrupt();
235
236	#define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
237	}
238	#endif
239
240	/*********************************************************************
241	*
242	* RTT lock configuration for KEIL ARM
243	*/
244	#ifdef __CC_ARM
245	#if (defined __TARGET_ARCH_6S_M)
246	#define SEGGER_RTT_LOCK() { \
247	unsigned int LockState; \
248	register unsigned char PRIMASK __asm( "primask"); \
249	LockState = PRIMASK; \
250	PRIMASK = 1u; \
251	__schedule_barrier();
252
253	#define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \
254	__schedule_barrier(); \
255	}
256	#elif (defined(__TARGET_ARCH_7_M) \|\| defined(__TARGET_ARCH_7E_M))
257	#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
258	#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
259	#endif
260	#define SEGGER_RTT_LOCK() { \
261	unsigned int LockState; \
262	register unsigned char BASEPRI __asm( "basepri"); \
263	LockState = BASEPRI; \
264	BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
265	__schedule_barrier();
266
267	#define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \
268	__schedule_barrier(); \
269	}
270	#endif
271	#endif
272
273	/*********************************************************************
274	*
275	* RTT lock configuration for TI ARM
276	*/
277	#ifdef __TI_ARM__
278	#if defined (__TI_ARM_V6M0__)
279	#define SEGGER_RTT_LOCK() { \
280	unsigned int LockState; \
281	LockState = __get_PRIMASK(); \
282	__set_PRIMASK(1);
283
284	#define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
285	}
286	#elif (defined (__TI_ARM_V7M3__) \|\| defined (__TI_ARM_V7M4__))
287	#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
288	#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
289	#endif
290	#define SEGGER_RTT_LOCK() { \
291	unsigned int LockState; \
292	LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
293
294	#define SEGGER_RTT_UNLOCK() _set_interrupt_priority(LockState); \
295	}
296	#endif
297	#endif
298
299	/*********************************************************************
300	*
301	* RTT lock configuration fallback
302	*/
303	#ifndef SEGGER_RTT_LOCK
304	#define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
305	#endif
306
307	#ifndef SEGGER_RTT_UNLOCK
308	#define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
309	#endif
310
311	#endif
312	/************************* End of file **************************/

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