| 1 | /********************************************************************* |
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| 2 | * SEGGER Microcontroller GmbH * |
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| 3 | * The Embedded Experts * |
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| 4 | ********************************************************************** |
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| 5 | * * |
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| 6 | * (c) 2014 - 2024 SEGGER Microcontroller GmbH * |
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| 7 | * * |
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| 8 | * www.segger.com Support: support@segger.com * |
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| 9 | * * |
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| 10 | ********************************************************************** |
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| 11 | * * |
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| 12 | * All rights reserved. * |
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| 13 | * * |
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| 14 | * Redistribution and use in source and binary forms, with or * |
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| 15 | * without modification, are permitted provided that the following * |
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| 16 | * condition is met: * |
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| 17 | * * |
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| 18 | * - Redistributions of source code must retain the above copyright * |
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| 19 | * notice, this condition and the following disclaimer. * |
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| 20 | * * |
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| 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * |
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| 22 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * |
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| 23 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * |
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| 24 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * |
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| 25 | * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * |
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| 26 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * |
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| 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * |
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| 28 | * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * |
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| 29 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * |
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| 30 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * |
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| 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * |
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| 32 | * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * |
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| 33 | * DAMAGE. * |
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| 34 | * * |
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| 35 | ********************************************************************** |
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| 36 | |
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| 37 | -------------------------- END-OF-HEADER ----------------------------- |
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| 38 | |
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| 39 | File : stm32g473xx_Vectors.s |
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| 40 | Purpose : Exception and interrupt vectors for stm32g473xx devices. |
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| 41 | |
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| 42 | Additional information: |
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| 43 | Preprocessor Definitions |
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| 44 | __NO_EXTERNAL_INTERRUPTS |
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| 45 | If defined, |
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| 46 | the vector table will contain only the internal exceptions |
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| 47 | and interrupts. |
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| 48 | __VECTORS_IN_RAM |
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| 49 | If defined, |
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| 50 | an area of RAM, large enough to store the vector table, |
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| 51 | will be reserved. |
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| 52 | |
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| 53 | __OPTIMIZATION_SMALL |
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| 54 | If defined, |
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| 55 | all weak definitions of interrupt handlers will share the |
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| 56 | same implementation. |
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| 57 | If not defined, |
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| 58 | all weak definitions of interrupt handlers will be defined |
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| 59 | with their own implementation. |
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| 60 | */ |
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| 61 | .syntax unified |
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| 62 | |
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| 63 | /********************************************************************* |
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| 64 | * |
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| 65 | * Macros |
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| 66 | * |
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| 67 | ********************************************************************** |
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| 68 | */ |
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| 69 | |
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| 70 | // |
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| 71 | // Directly place a vector (word) in the vector table |
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| 72 | // |
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| 73 | .macro VECTOR Name= |
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| 74 | .section .vectors, "ax" |
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| 75 | .code 16 |
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| 76 | .word \Name |
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| 77 | .endm |
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| 78 | |
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| 79 | // |
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| 80 | // Declare an exception handler with a weak definition |
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| 81 | // |
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| 82 | .macro EXC_HANDLER Name= |
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| 83 | // |
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| 84 | // Insert vector in vector table |
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| 85 | // |
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| 86 | .section .vectors, "ax" |
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| 87 | .word \Name |
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| 88 | // |
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| 89 | // Insert dummy handler in init section |
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| 90 | // |
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| 91 | .section .init.\Name, "ax" |
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| 92 | .thumb_func |
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| 93 | .weak \Name |
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| 94 | .balign 2 |
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| 95 | \Name: |
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| 96 | 1: b 1b // Endless loop |
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| 97 | .endm |
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| 98 | |
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| 99 | // |
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| 100 | // Declare an interrupt handler with a weak definition |
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| 101 | // |
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| 102 | .macro ISR_HANDLER Name= |
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| 103 | // |
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| 104 | // Insert vector in vector table |
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| 105 | // |
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| 106 | .section .vectors, "ax" |
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| 107 | .word \Name |
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| 108 | // |
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| 109 | // Insert dummy handler in init section |
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| 110 | // |
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| 111 | #if defined(__OPTIMIZATION_SMALL) |
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| 112 | .section .init, "ax" |
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| 113 | .weak \Name |
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| 114 | .thumb_set \Name,Dummy_Handler |
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| 115 | #else |
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| 116 | .section .init.\Name, "ax" |
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| 117 | .thumb_func |
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| 118 | .weak \Name |
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| 119 | .balign 2 |
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| 120 | \Name: |
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| 121 | 1: b 1b // Endless loop |
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| 122 | #endif |
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| 123 | .endm |
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| 124 | |
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| 125 | // |
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| 126 | // Place a reserved vector in vector table |
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| 127 | // |
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| 128 | .macro ISR_RESERVED |
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| 129 | .section .vectors, "ax" |
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| 130 | .word 0 |
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| 131 | .endm |
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| 132 | |
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| 133 | // |
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| 134 | // Place a reserved vector in vector table |
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| 135 | // |
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| 136 | .macro ISR_RESERVED_DUMMY |
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| 137 | .section .vectors, "ax" |
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| 138 | .word Dummy_Handler |
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| 139 | .endm |
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| 140 | |
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| 141 | /********************************************************************* |
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| 142 | * |
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| 143 | * Externals |
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| 144 | * |
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| 145 | ********************************************************************** |
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| 146 | */ |
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| 147 | .extern __stack_end__ |
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| 148 | .extern Reset_Handler |
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| 149 | .extern HardFault_Handler |
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| 150 | |
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| 151 | /********************************************************************* |
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| 152 | * |
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| 153 | * Global functions |
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| 154 | * |
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| 155 | ********************************************************************** |
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| 156 | */ |
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| 157 | |
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| 158 | /********************************************************************* |
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| 159 | * |
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| 160 | * Setup of the vector table and weak definition of interrupt handlers |
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| 161 | * |
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| 162 | */ |
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| 163 | .section .vectors, "ax" |
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| 164 | .code 16 |
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| 165 | .balign 512 |
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| 166 | .global _vectors |
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| 167 | _vectors: |
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| 168 | // |
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| 169 | // Internal exceptions and interrupts |
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| 170 | // |
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| 171 | VECTOR __stack_end__ |
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| 172 | VECTOR Reset_Handler |
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| 173 | EXC_HANDLER NMI_Handler |
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| 174 | VECTOR HardFault_Handler |
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| 175 | #ifdef __ARM_ARCH_6M__ |
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| 176 | ISR_RESERVED |
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| 177 | ISR_RESERVED |
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| 178 | ISR_RESERVED |
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| 179 | #else |
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| 180 | EXC_HANDLER MemManage_Handler |
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| 181 | EXC_HANDLER BusFault_Handler |
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| 182 | EXC_HANDLER UsageFault_Handler |
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| 183 | #endif |
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| 184 | ISR_RESERVED |
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| 185 | ISR_RESERVED |
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| 186 | ISR_RESERVED |
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| 187 | ISR_RESERVED |
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| 188 | EXC_HANDLER SVC_Handler |
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| 189 | #ifdef __ARM_ARCH_6M__ |
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| 190 | ISR_RESERVED |
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| 191 | #else |
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| 192 | EXC_HANDLER DebugMon_Handler |
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| 193 | #endif |
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| 194 | ISR_RESERVED |
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| 195 | EXC_HANDLER PendSV_Handler |
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| 196 | EXC_HANDLER SysTick_Handler |
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| 197 | // |
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| 198 | // External interrupts |
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| 199 | // |
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| 200 | #ifndef __NO_EXTERNAL_INTERRUPTS |
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| 201 | ISR_HANDLER WWDG_IRQHandler |
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| 202 | ISR_HANDLER PVD_PVM_IRQHandler |
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| 203 | ISR_HANDLER RTC_TAMP_LSECSS_IRQHandler |
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| 204 | ISR_HANDLER RTC_WKUP_IRQHandler |
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| 205 | ISR_HANDLER FLASH_IRQHandler |
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| 206 | ISR_HANDLER RCC_IRQHandler |
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| 207 | ISR_HANDLER EXTI0_IRQHandler |
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| 208 | ISR_HANDLER EXTI1_IRQHandler |
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| 209 | ISR_HANDLER EXTI2_IRQHandler |
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| 210 | ISR_HANDLER EXTI3_IRQHandler |
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| 211 | ISR_HANDLER EXTI4_IRQHandler |
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| 212 | ISR_HANDLER DMA1_Channel1_IRQHandler |
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| 213 | ISR_HANDLER DMA1_Channel2_IRQHandler |
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| 214 | ISR_HANDLER DMA1_Channel3_IRQHandler |
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| 215 | ISR_HANDLER DMA1_Channel4_IRQHandler |
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| 216 | ISR_HANDLER DMA1_Channel5_IRQHandler |
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| 217 | ISR_HANDLER DMA1_Channel6_IRQHandler |
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| 218 | ISR_HANDLER DMA1_Channel7_IRQHandler |
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| 219 | ISR_HANDLER ADC1_2_IRQHandler |
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| 220 | ISR_HANDLER USB_HP_IRQHandler |
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| 221 | ISR_HANDLER USB_LP_IRQHandler |
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| 222 | ISR_HANDLER FDCAN1_IT0_IRQHandler |
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| 223 | ISR_HANDLER FDCAN1_IT1_IRQHandler |
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| 224 | ISR_HANDLER EXTI9_5_IRQHandler |
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| 225 | ISR_HANDLER TIM1_BRK_TIM15_IRQHandler |
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| 226 | ISR_HANDLER TIM1_UP_TIM16_IRQHandler |
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| 227 | ISR_HANDLER TIM1_TRG_COM_TIM17_IRQHandler |
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| 228 | ISR_HANDLER TIM1_CC_IRQHandler |
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| 229 | ISR_HANDLER TIM2_IRQHandler |
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| 230 | ISR_HANDLER TIM3_IRQHandler |
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| 231 | ISR_HANDLER TIM4_IRQHandler |
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| 232 | ISR_HANDLER I2C1_EV_IRQHandler |
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| 233 | ISR_HANDLER I2C1_ER_IRQHandler |
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| 234 | ISR_HANDLER I2C2_EV_IRQHandler |
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| 235 | ISR_HANDLER I2C2_ER_IRQHandler |
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| 236 | ISR_HANDLER SPI1_IRQHandler |
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| 237 | ISR_HANDLER SPI2_IRQHandler |
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| 238 | ISR_HANDLER USART1_IRQHandler |
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| 239 | ISR_HANDLER USART2_IRQHandler |
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| 240 | ISR_HANDLER USART3_IRQHandler |
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| 241 | ISR_HANDLER EXTI15_10_IRQHandler |
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| 242 | ISR_HANDLER RTC_Alarm_IRQHandler |
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| 243 | ISR_HANDLER USBWakeUp_IRQHandler |
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| 244 | ISR_HANDLER TIM8_BRK_IRQHandler |
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| 245 | ISR_HANDLER TIM8_UP_IRQHandler |
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| 246 | ISR_HANDLER TIM8_TRG_COM_IRQHandler |
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| 247 | ISR_HANDLER TIM8_CC_IRQHandler |
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| 248 | ISR_HANDLER ADC3_IRQHandler |
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| 249 | ISR_HANDLER FMC_IRQHandler |
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| 250 | ISR_HANDLER LPTIM1_IRQHandler |
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| 251 | ISR_HANDLER TIM5_IRQHandler |
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| 252 | ISR_HANDLER SPI3_IRQHandler |
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| 253 | ISR_HANDLER UART4_IRQHandler |
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| 254 | ISR_HANDLER UART5_IRQHandler |
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| 255 | ISR_HANDLER TIM6_DAC_IRQHandler |
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| 256 | ISR_HANDLER TIM7_DAC_IRQHandler |
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| 257 | ISR_HANDLER DMA2_Channel1_IRQHandler |
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| 258 | ISR_HANDLER DMA2_Channel2_IRQHandler |
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| 259 | ISR_HANDLER DMA2_Channel3_IRQHandler |
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| 260 | ISR_HANDLER DMA2_Channel4_IRQHandler |
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| 261 | ISR_HANDLER DMA2_Channel5_IRQHandler |
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| 262 | ISR_HANDLER ADC4_IRQHandler |
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| 263 | ISR_HANDLER ADC5_IRQHandler |
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| 264 | ISR_HANDLER UCPD1_IRQHandler |
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| 265 | ISR_HANDLER COMP1_2_3_IRQHandler |
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| 266 | ISR_HANDLER COMP4_5_6_IRQHandler |
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| 267 | ISR_HANDLER COMP7_IRQHandler |
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| 268 | ISR_RESERVED |
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| 269 | ISR_RESERVED |
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| 270 | ISR_RESERVED |
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| 271 | ISR_RESERVED |
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| 272 | ISR_RESERVED |
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| 273 | ISR_RESERVED |
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| 274 | ISR_RESERVED |
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| 275 | ISR_RESERVED |
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| 276 | ISR_HANDLER CRS_IRQHandler |
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| 277 | ISR_HANDLER SAI1_IRQHandler |
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| 278 | ISR_HANDLER TIM20_BRK_IRQHandler |
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| 279 | ISR_HANDLER TIM20_UP_IRQHandler |
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| 280 | ISR_HANDLER TIM20_TRG_COM_IRQHandler |
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| 281 | ISR_HANDLER TIM20_CC_IRQHandler |
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| 282 | ISR_HANDLER FPU_IRQHandler |
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| 283 | ISR_HANDLER I2C4_EV_IRQHandler |
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| 284 | ISR_HANDLER I2C4_ER_IRQHandler |
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| 285 | ISR_HANDLER SPI4_IRQHandler |
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| 286 | ISR_RESERVED |
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| 287 | ISR_HANDLER FDCAN2_IT0_IRQHandler |
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| 288 | ISR_HANDLER FDCAN2_IT1_IRQHandler |
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| 289 | ISR_HANDLER FDCAN3_IT0_IRQHandler |
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| 290 | ISR_HANDLER FDCAN3_IT1_IRQHandler |
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| 291 | ISR_HANDLER RNG_IRQHandler |
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| 292 | ISR_HANDLER LPUART1_IRQHandler |
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| 293 | ISR_HANDLER I2C3_EV_IRQHandler |
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| 294 | ISR_HANDLER I2C3_ER_IRQHandler |
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| 295 | ISR_HANDLER DMAMUX_OVR_IRQHandler |
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| 296 | ISR_HANDLER QUADSPI_IRQHandler |
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| 297 | ISR_HANDLER DMA1_Channel8_IRQHandler |
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| 298 | ISR_HANDLER DMA2_Channel6_IRQHandler |
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| 299 | ISR_HANDLER DMA2_Channel7_IRQHandler |
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| 300 | ISR_HANDLER DMA2_Channel8_IRQHandler |
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| 301 | ISR_HANDLER CORDIC_IRQHandler |
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| 302 | ISR_HANDLER FMAC_IRQHandler |
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| 303 | #endif |
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| 304 | // |
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| 305 | .section .vectors, "ax" |
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| 306 | _vectors_end: |
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| 307 | |
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| 308 | #ifdef __VECTORS_IN_RAM |
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| 309 | // |
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| 310 | // Reserve space with the size of the vector table |
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| 311 | // in the designated RAM section. |
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| 312 | // |
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| 313 | .section .vectors_ram, "ax" |
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| 314 | .balign 512 |
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| 315 | .global _vectors_ram |
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| 316 | |
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| 317 | _vectors_ram: |
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| 318 | .space _vectors_end - _vectors, 0 |
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| 319 | #endif |
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| 320 | |
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| 321 | /********************************************************************* |
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| 322 | * |
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| 323 | * Dummy handler to be used for reserved interrupt vectors |
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| 324 | * and weak implementation of interrupts. |
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| 325 | * |
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| 326 | */ |
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| 327 | .section .init.Dummy_Handler, "ax" |
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| 328 | .thumb_func |
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| 329 | .weak Dummy_Handler |
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| 330 | .balign 2 |
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| 331 | Dummy_Handler: |
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| 332 | 1: b 1b // Endless loop |
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| 333 | |
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| 334 | |
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| 335 | /*************************** End of file ****************************/ |
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