1 | /** |
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2 | ****************************************************************************** |
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3 | * @file system_stm32c0xx.c |
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4 | * @author MCD Application Team |
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5 | * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File |
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6 | * |
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7 | * This file provides two functions and one global variable to be called from |
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8 | * user application: |
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9 | * - SystemInit(): This function is called at startup just after reset and |
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10 | * before branch to main program. This call is made inside |
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11 | * the "startup_stm32c0xx.s" file. |
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12 | * |
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13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
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14 | * by the user application to setup the SysTick |
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15 | * timer or configure other parameters. |
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16 | * |
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17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
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18 | * be called whenever the core clock is changed |
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19 | * during program execution. |
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20 | * |
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21 | ****************************************************************************** |
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22 | * @attention |
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23 | * |
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24 | * Copyright (c) 2022 STMicroelectronics. |
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25 | * All rights reserved. |
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26 | * |
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27 | * This software is licensed under terms that can be found in the LICENSE file |
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28 | * in the root directory of this software component. |
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29 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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30 | * |
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31 | ****************************************************************************** |
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32 | */ |
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33 | |
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34 | /** @addtogroup CMSIS |
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35 | * @{ |
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36 | */ |
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37 | |
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38 | /** @addtogroup stm32c0xx_system |
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39 | * @{ |
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40 | */ |
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41 | |
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42 | /** @addtogroup STM32C0xx_System_Private_Includes |
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43 | * @{ |
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44 | */ |
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45 | |
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46 | #include "stm32c0xx.h" |
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47 | |
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48 | #if !defined (HSE_VALUE) |
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49 | #define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */ |
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50 | #endif /* HSE_VALUE */ |
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51 | |
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52 | #if !defined (HSI_VALUE) |
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53 | #define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/ |
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54 | #endif /* HSI_VALUE */ |
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55 | |
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56 | #if !defined (LSI_VALUE) |
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57 | #define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/ |
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58 | #endif /* LSI_VALUE */ |
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59 | |
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60 | #if !defined (LSE_VALUE) |
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61 | #define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/ |
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62 | #endif /* LSE_VALUE */ |
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63 | |
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64 | #if defined(RCC_HSI48_SUPPORT) |
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65 | #if !defined (HSI48_VALUE) |
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66 | #define HSI48_VALUE 48000000U /*!< Value of the HSI48 oscillator in Hz */ |
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67 | #endif /* HSI48_VALUE */ |
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68 | #endif /* RCC_HSI48_SUPPORT */ |
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69 | |
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70 | /** |
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71 | * @} |
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72 | */ |
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73 | |
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74 | /** @addtogroup STM32C0xx_System_Private_TypesDefinitions |
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75 | * @{ |
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76 | */ |
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77 | |
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78 | /** |
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79 | * @} |
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80 | */ |
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81 | |
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82 | /** @addtogroup STM32C0xx_System_Private_Defines |
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83 | * @{ |
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84 | */ |
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85 | |
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86 | /************************* Miscellaneous Configuration ************************/ |
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87 | /*!< Uncomment the following line if you need to relocate your vector Table in |
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88 | Internal SRAM. */ |
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89 | //#define VECT_TAB_SRAM |
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90 | #define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field. |
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91 | This value must be a multiple of 0x100. */ |
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92 | /******************************************************************************/ |
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93 | /** |
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94 | * @} |
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95 | */ |
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96 | |
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97 | /** @addtogroup STM32C0xx_System_Private_Macros |
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98 | * @{ |
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99 | */ |
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100 | |
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101 | /** |
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102 | * @} |
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103 | */ |
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104 | |
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105 | /** @addtogroup STM32C0xx_System_Private_Variables |
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106 | * @{ |
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107 | */ |
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108 | /* The SystemCoreClock variable is updated in three ways: |
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109 | 1) by calling CMSIS function SystemCoreClockUpdate() |
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110 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() |
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111 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
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112 | Note: If you use this function to configure the system clock; then there |
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113 | is no need to call the 2 first functions listed above, since SystemCoreClock |
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114 | variable is updated automatically. |
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115 | */ |
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116 | uint32_t SystemCoreClock = 12000000UL; |
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117 | |
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118 | const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL}; |
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119 | const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL}; |
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120 | |
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121 | /** |
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122 | * @} |
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123 | */ |
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124 | |
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125 | /** @addtogroup STM32C0xx_System_Private_FunctionPrototypes |
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126 | * @{ |
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127 | */ |
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128 | |
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129 | /** |
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130 | * @} |
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131 | */ |
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132 | |
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133 | /** @addtogroup STM32C0xx_System_Private_Functions |
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134 | * @{ |
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135 | */ |
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136 | |
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137 | /** |
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138 | * @brief Setup the microcontroller system. |
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139 | * @param None |
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140 | * @retval None |
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141 | */ |
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142 | void SystemInit(void) |
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143 | { |
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144 | |
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145 | /* Configure the Vector Table location add offset address ------------------*/ |
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146 | #ifdef VECT_TAB_SRAM |
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147 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ |
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148 | #else |
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149 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ |
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150 | #endif |
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151 | } |
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152 | |
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153 | /** |
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154 | * @brief Update SystemCoreClock variable according to Clock Register Values. |
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155 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
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156 | * be used by the user application to setup the SysTick timer or configure |
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157 | * other parameters. |
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158 | * |
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159 | * @note Each time the core clock (HCLK) changes, this function must be called |
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160 | * to update SystemCoreClock variable value. Otherwise, any configuration |
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161 | * based on this variable will be incorrect. |
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162 | * |
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163 | * @note - The system frequency computed by this function is not the real |
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164 | * frequency in the chip. It is calculated based on the predefined |
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165 | * constant and the selected clock source: |
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166 | * |
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167 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor |
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168 | * |
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169 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) |
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170 | * |
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171 | * - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE |
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172 | * |
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173 | * - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE |
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174 | * |
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175 | * (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value |
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176 | * 48 MHz) but the real value may vary depending on the variations |
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177 | * in voltage and temperature. |
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178 | * |
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179 | * (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value |
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180 | * 48 MHz), user has to ensure that HSE_VALUE is same as the real |
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181 | * frequency of the crystal used. Otherwise, this function may |
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182 | * have wrong result. |
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183 | * |
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184 | * - The result of this function could be not correct when using fractional |
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185 | * value for HSE crystal. |
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186 | * |
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187 | * @param None |
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188 | * @retval None |
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189 | */ |
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190 | void SystemCoreClockUpdate(void) |
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191 | { |
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192 | uint32_t tmp; |
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193 | uint32_t hsidiv; |
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194 | uint32_t sysdiv; |
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195 | #if defined(RCC_CR_SYSDIV) |
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196 | sysdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U); |
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197 | #else |
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198 | sysdiv = 1U; |
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199 | #endif /* RCC_CR_SYSDIV */ |
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200 | |
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201 | /* Get SYSCLK source -------------------------------------------------------*/ |
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202 | switch (RCC->CFGR & RCC_CFGR_SWS) |
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203 | { |
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204 | case RCC_CFGR_SWS_0: /* HSE used as system clock */ |
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205 | SystemCoreClock = (HSE_VALUE / sysdiv); |
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206 | break; |
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207 | |
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208 | #if defined(RCC_HSI48_SUPPORT) |
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209 | case RCC_CFGR_SW_1: /* HSI48 used as system clock */ |
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210 | SystemCoreClock = (HSI48_VALUE / sysdiv); |
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211 | break; |
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212 | #endif /* RCC_HSI48_SUPPORT */ |
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213 | |
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214 | case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */ |
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215 | SystemCoreClock = (LSI_VALUE / sysdiv); |
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216 | break; |
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217 | |
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218 | case RCC_CFGR_SWS_2: /* LSE used as system clock */ |
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219 | SystemCoreClock = (LSE_VALUE / sysdiv); |
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220 | break; |
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221 | |
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222 | case 0x00000000U: /* HSI used as system clock */ |
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223 | default: /* HSI used as system clock */ |
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224 | hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos)); |
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225 | SystemCoreClock = ((HSI_VALUE / sysdiv) / hsidiv); |
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226 | break; |
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227 | } |
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228 | /* Compute HCLK clock frequency --------------------------------------------*/ |
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229 | /* Get HCLK prescaler */ |
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230 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; |
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231 | /* HCLK clock frequency */ |
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232 | SystemCoreClock >>= tmp; |
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233 | } |
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234 | |
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235 | |
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236 | /** |
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237 | * @} |
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238 | */ |
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239 | |
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240 | /** |
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241 | * @} |
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242 | */ |
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243 | |
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244 | /** |
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245 | * @} |
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246 | */ |
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