Changeset 92 for ctrl/firmware/Main/CubeMX
- Timestamp:
- Feb 14, 2025, 8:27:41 AM (3 months ago)
- Location:
- ctrl/firmware/Main/CubeMX
- Files:
-
- 2 added
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
ctrl/firmware/Main/CubeMX/Core/Inc/adc.h
r91 r92 35 35 /* USER CODE END Includes */ 36 36 37 extern ADC_HandleTypeDef hadc 1;37 extern ADC_HandleTypeDef hadc3; 38 38 39 39 /* USER CODE BEGIN Private defines */ 40 40 41 #define ADC 1_CHANNELS (1U)41 #define ADC3_CHANNELS (4U) 42 42 43 typedef union ADC 1_data_t43 typedef union ADC3_data_t 44 44 { 45 uint16_t Data[ADC1_CHANNELS];46 struct Raw45 uint16_t Raw[ADC3_CHANNELS]; 46 struct 47 47 { 48 uint16_t U_Bat; 49 }Raw; 50 }ADC1_data_t __attribute__((packed, aligned(32))); 48 uint16_t Vbat; 49 uint16_t Vref; 50 uint16_t CPUTemp; 51 uint16_t UBat; 52 }; 53 } __attribute__((packed, aligned(32))) ADC3_data_t; 51 54 52 55 /* USER CODE END Private defines */ 53 56 54 void MX_ADC 1_Init(void);57 void MX_ADC3_Init(void); 55 58 56 59 /* USER CODE BEGIN Prototypes */ -
ctrl/firmware/Main/CubeMX/Core/Inc/main.h
r89 r92 68 68 #define EEPROM_I2C_SCL_Pin GPIO_PIN_1 69 69 #define EEPROM_I2C_SCL_GPIO_Port GPIOF 70 #define U_BAT_Pin GPIO_PIN_0 71 #define U_BAT_GPIO_Port GPIOC 70 72 #define POWER_4V_EN_Pin GPIO_PIN_15 71 73 #define POWER_4V_EN_GPIO_Port GPIOF -
ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h
r91 r92 58 58 void DMA1_Stream3_IRQHandler(void); 59 59 void DMA1_Stream4_IRQHandler(void); 60 void DMA1_Stream5_IRQHandler(void);61 60 void EXTI9_5_IRQHandler(void); 62 61 void TIM3_IRQHandler(void); … … 69 68 void SPI4_IRQHandler(void); 70 69 void MDMA_IRQHandler(void); 70 void BDMA_Channel0_IRQHandler(void); 71 71 void USART10_IRQHandler(void); 72 72 /* USER CODE BEGIN EFP */ -
ctrl/firmware/Main/CubeMX/Core/Src/adc.c
r91 r92 23 23 /* USER CODE BEGIN 0 */ 24 24 25 ADC 1_data_t ADC1_Data;25 ADC3_data_t ADC3_values __attribute__((section(".BKP_RAM_4_DMA"))); 26 26 27 27 /* USER CODE END 0 */ 28 28 29 ADC_HandleTypeDef hadc 1;30 DMA_HandleTypeDef hdma_adc 1;31 32 /* ADC 1init function */33 void MX_ADC 1_Init(void)29 ADC_HandleTypeDef hadc3; 30 DMA_HandleTypeDef hdma_adc3; 31 32 /* ADC3 init function */ 33 void MX_ADC3_Init(void) 34 34 { 35 35 36 /* USER CODE BEGIN ADC1_Init 0 */ 37 38 /* USER CODE END ADC1_Init 0 */ 39 40 ADC_MultiModeTypeDef multimode = {0}; 36 /* USER CODE BEGIN ADC3_Init 0 */ 37 38 /* USER CODE END ADC3_Init 0 */ 39 41 40 ADC_ChannelConfTypeDef sConfig = {0}; 42 41 43 /* USER CODE BEGIN ADC 1_Init 1 */44 45 /* USER CODE END ADC 1_Init 1 */42 /* USER CODE BEGIN ADC3_Init 1 */ 43 44 /* USER CODE END ADC3_Init 1 */ 46 45 47 46 /** Common config 48 47 */ 49 hadc1.Instance = ADC1; 50 hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256; 51 hadc1.Init.Resolution = ADC_RESOLUTION_16B; 52 hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 53 hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV; 54 hadc1.Init.LowPowerAutoWait = DISABLE; 55 hadc1.Init.ContinuousConvMode = ENABLE; 56 hadc1.Init.NbrOfConversion = 1; 57 hadc1.Init.DiscontinuousConvMode = DISABLE; 58 hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 59 hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 60 hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR; 61 hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 62 hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; 63 hadc1.Init.OversamplingMode = ENABLE; 64 hadc1.Init.Oversampling.Ratio = 1024; 65 hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11; 66 hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER; 67 hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE; 68 if (HAL_ADC_Init(&hadc1) != HAL_OK) 69 { 70 Error_Handler(); 71 } 72 73 /** Configure the ADC multi-mode 74 */ 75 multimode.Mode = ADC_MODE_INDEPENDENT; 76 if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 77 { 78 Error_Handler(); 79 } 80 81 /** Configure Regular Channel 82 */ 83 sConfig.Channel = ADC_CHANNEL_10; 48 hadc3.Instance = ADC3; 49 hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256; 50 hadc3.Init.Resolution = ADC_RESOLUTION_12B; 51 hadc3.Init.DataAlign = ADC3_DATAALIGN_RIGHT; 52 hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE; 53 hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; 54 hadc3.Init.LowPowerAutoWait = DISABLE; 55 hadc3.Init.ContinuousConvMode = ENABLE; 56 hadc3.Init.NbrOfConversion = 4; 57 hadc3.Init.DiscontinuousConvMode = DISABLE; 58 hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; 59 hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 60 hadc3.Init.DMAContinuousRequests = ENABLE; 61 hadc3.Init.SamplingMode = ADC_SAMPLING_MODE_NORMAL; 62 hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR; 63 hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 64 hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; 65 hadc3.Init.OversamplingMode = ENABLE; 66 hadc3.Init.Oversampling.Ratio = ADC3_OVERSAMPLING_RATIO_256; 67 hadc3.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11; 68 hadc3.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER; 69 hadc3.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE; 70 if (HAL_ADC_Init(&hadc3) != HAL_OK) 71 { 72 Error_Handler(); 73 } 74 75 /** Configure Regular Channel 76 */ 77 sConfig.Channel = ADC_CHANNEL_VBAT; 84 78 sConfig.Rank = ADC_REGULAR_RANK_1; 85 sConfig.SamplingTime = ADC _SAMPLETIME_810CYCLES_5;79 sConfig.SamplingTime = ADC3_SAMPLETIME_640CYCLES_5; 86 80 sConfig.SingleDiff = ADC_SINGLE_ENDED; 87 81 sConfig.OffsetNumber = ADC_OFFSET_NONE; 88 82 sConfig.Offset = 0; 89 sConfig.OffsetSignedSaturation = DISABLE; 90 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 91 { 92 Error_Handler(); 93 } 94 /* USER CODE BEGIN ADC1_Init 2 */ 95 96 HAL_StatusTypeDef r = HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&ADC1_Data, ADC1_CHANNELS); 97 if (r != HAL_OK) printf("Cannot initialize ADC1!\n"); 98 __HAL_DMA_DISABLE_IT(&hdma_adc1, DMA_IT_HT); 99 100 /* USER CODE END ADC1_Init 2 */ 83 sConfig.OffsetSign = ADC3_OFFSET_SIGN_NEGATIVE; 84 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 85 { 86 Error_Handler(); 87 } 88 89 /** Configure Regular Channel 90 */ 91 sConfig.Channel = ADC_CHANNEL_VREFINT; 92 sConfig.Rank = ADC_REGULAR_RANK_2; 93 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 94 { 95 Error_Handler(); 96 } 97 98 /** Configure Regular Channel 99 */ 100 sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; 101 sConfig.Rank = ADC_REGULAR_RANK_3; 102 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 103 { 104 Error_Handler(); 105 } 106 107 /** Configure Regular Channel 108 */ 109 sConfig.Channel = ADC_CHANNEL_10; 110 sConfig.Rank = ADC_REGULAR_RANK_4; 111 sConfig.SamplingTime = ADC3_SAMPLETIME_2CYCLES_5; 112 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 113 { 114 Error_Handler(); 115 } 116 /* USER CODE BEGIN ADC3_Init 2 */ 117 118 if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED)) Error_Handler(); 119 if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED)) Error_Handler(); 120 121 if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&ADC3_values, 2)) Error_Handler(); 122 __HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT); 123 124 125 /* USER CODE END ADC3_Init 2 */ 101 126 102 127 } … … 106 131 107 132 GPIO_InitTypeDef GPIO_InitStruct = {0}; 108 if(adcHandle->Instance==ADC 1)109 { 110 /* USER CODE BEGIN ADC 1_MspInit 0 */111 112 /* USER CODE END ADC 1_MspInit 0 */113 /* ADC 1clock enable */114 __HAL_RCC_ADC 12_CLK_ENABLE();133 if(adcHandle->Instance==ADC3) 134 { 135 /* USER CODE BEGIN ADC3_MspInit 0 */ 136 137 /* USER CODE END ADC3_MspInit 0 */ 138 /* ADC3 clock enable */ 139 __HAL_RCC_ADC3_CLK_ENABLE(); 115 140 116 141 __HAL_RCC_GPIOC_CLK_ENABLE(); 117 /**ADC 1GPIO Configuration118 PC0 ------> ADC 1_INP10142 /**ADC3 GPIO Configuration 143 PC0 ------> ADC3_INP10 119 144 */ 120 GPIO_InitStruct.Pin = GPIO_PIN_0;145 GPIO_InitStruct.Pin = U_BAT_Pin; 121 146 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 122 147 GPIO_InitStruct.Pull = GPIO_NOPULL; 123 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 124 125 /* ADC1 DMA Init */ 126 /* ADC1 Init */ 127 hdma_adc1.Instance = DMA1_Stream5; 128 hdma_adc1.Init.Request = DMA_REQUEST_ADC1; 129 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 130 hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 131 hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 132 hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 133 hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 134 hdma_adc1.Init.Mode = DMA_CIRCULAR; 135 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 136 hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 137 if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 148 HAL_GPIO_Init(U_BAT_GPIO_Port, &GPIO_InitStruct); 149 150 /* ADC3 DMA Init */ 151 /* ADC3 Init */ 152 hdma_adc3.Instance = BDMA_Channel0; 153 hdma_adc3.Init.Request = BDMA_REQUEST_ADC3; 154 hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY; 155 hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE; 156 hdma_adc3.Init.MemInc = DMA_MINC_ENABLE; 157 hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 158 hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 159 hdma_adc3.Init.Mode = DMA_CIRCULAR; 160 hdma_adc3.Init.Priority = DMA_PRIORITY_LOW; 161 if (HAL_DMA_Init(&hdma_adc3) != HAL_OK) 138 162 { 139 163 Error_Handler(); 140 164 } 141 165 142 __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc 1);143 144 /* USER CODE BEGIN ADC 1_MspInit 1 */145 146 /* USER CODE END ADC 1_MspInit 1 */166 __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc3); 167 168 /* USER CODE BEGIN ADC3_MspInit 1 */ 169 170 /* USER CODE END ADC3_MspInit 1 */ 147 171 } 148 172 } … … 151 175 { 152 176 153 if(adcHandle->Instance==ADC 1)154 { 155 /* USER CODE BEGIN ADC 1_MspDeInit 0 */156 157 /* USER CODE END ADC 1_MspDeInit 0 */177 if(adcHandle->Instance==ADC3) 178 { 179 /* USER CODE BEGIN ADC3_MspDeInit 0 */ 180 181 /* USER CODE END ADC3_MspDeInit 0 */ 158 182 /* Peripheral clock disable */ 159 __HAL_RCC_ADC 12_CLK_DISABLE();160 161 /**ADC 1GPIO Configuration162 PC0 ------> ADC 1_INP10183 __HAL_RCC_ADC3_CLK_DISABLE(); 184 185 /**ADC3 GPIO Configuration 186 PC0 ------> ADC3_INP10 163 187 */ 164 HAL_GPIO_DeInit( GPIOC, GPIO_PIN_0);165 166 /* ADC 1DMA DeInit */188 HAL_GPIO_DeInit(U_BAT_GPIO_Port, U_BAT_Pin); 189 190 /* ADC3 DMA DeInit */ 167 191 HAL_DMA_DeInit(adcHandle->DMA_Handle); 168 /* USER CODE BEGIN ADC 1_MspDeInit 1 */169 170 /* USER CODE END ADC 1_MspDeInit 1 */192 /* USER CODE BEGIN ADC3_MspDeInit 1 */ 193 194 /* USER CODE END ADC3_MspDeInit 1 */ 171 195 } 172 196 } -
ctrl/firmware/Main/CubeMX/Core/Src/dma.c
r91 r92 59 59 HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0); 60 60 HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); 61 /* DMA1_Stream5_IRQn interrupt configuration */62 HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);63 HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);64 61 65 62 } -
ctrl/firmware/Main/CubeMX/Core/Src/main.c
r91 r92 21 21 #include "cmsis_os.h" 22 22 #include "adc.h" 23 #include "bdma.h" 23 24 #include "dma.h" 24 25 #include "fatfs.h" … … 131 132 MX_DMA_Init(); 132 133 //MX_MDMA_Init(); 134 MX_BDMA_Init(); 133 135 MX_RTC_Init(); 134 136 MX_SPI4_Init(); 135 137 MX_SDMMC1_SD_Init(); 136 138 MX_USART3_UART_Init(); 137 MX_TIM3_Init();138 139 MX_FATFS_Init(); 139 140 MX_TIM8_Init(); … … 142 143 MX_USART10_UART_Init(); 143 144 MX_TIM6_Init(); 145 MX_I2C2_Init(); 146 MX_ADC3_Init(); 144 147 MX_I2C1_Init(); 145 MX_I2C2_Init(); 146 MX_ADC1_Init(); 148 MX_TIM3_Init(); 147 149 /* USER CODE BEGIN 2 */ 148 150 … … 300 302 MPU_InitStruct.Number = MPU_REGION_NUMBER1; 301 303 MPU_InitStruct.BaseAddress = 0x24000000; 302 MPU_InitStruct.Size = MPU_REGION_SIZE_ 128KB;304 MPU_InitStruct.Size = MPU_REGION_SIZE_8KB; 303 305 MPU_InitStruct.SubRegionDisable = 0x0; 304 306 MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; … … 371 373 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 372 374 375 printf("Wrong parameters value: file %s on line %d\r\n", file, line); 376 373 377 /* USER CODE END 6 */ 374 378 } -
ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c
r91 r92 61 61 62 62 /* External variables --------------------------------------------------------*/ 63 extern DMA_HandleTypeDef hdma_adc 1;63 extern DMA_HandleTypeDef hdma_adc3; 64 64 extern MDMA_HandleTypeDef hmdma_mdma_channel0_sdmmc1_end_data_0; 65 65 extern SD_HandleTypeDef hsd1; … … 251 251 252 252 /** 253 * @brief This function handles DMA1 stream5 global interrupt.254 */255 void DMA1_Stream5_IRQHandler(void)256 {257 /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */258 259 /* USER CODE END DMA1_Stream5_IRQn 0 */260 HAL_DMA_IRQHandler(&hdma_adc1);261 /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */262 263 /* USER CODE END DMA1_Stream5_IRQn 1 */264 }265 266 /**267 253 * @brief This function handles EXTI line[9:5] interrupts. 268 254 */ … … 406 392 407 393 /* USER CODE END MDMA_IRQn 1 */ 394 } 395 396 /** 397 * @brief This function handles BDMA channel0 global interrupt. 398 */ 399 void BDMA_Channel0_IRQHandler(void) 400 { 401 /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */ 402 403 /* USER CODE END BDMA_Channel0_IRQn 0 */ 404 HAL_DMA_IRQHandler(&hdma_adc3); 405 /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */ 406 407 /* USER CODE END BDMA_Channel0_IRQn 1 */ 408 408 } 409 409 -
ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c
r91 r92 21 21 uint8_t retSD; /* Return value for SD */ 22 22 char SDPath[4]; /* SD logical drive path */ 23 FATFS SDFatFS __attribute__((section(". AXI_RAM")));/* File system object for SD logical drive */24 FIL SDFile ;/* File object for SD */23 FATFS SDFatFS __attribute__((section(".RAM_4_DMA"))); /* File system object for SD logical drive */ 24 FIL SDFile __attribute__((section(".RAM_4_DMA"))); /* File object for SD */ 25 25 26 26 /* USER CODE BEGIN Variables */ -
ctrl/firmware/Main/CubeMX/charger.ioc
r91 r92 1 1 #MicroXplorer Configuration settings - do not modify 2 ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_10 3 ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV256 4 ADC1.ContinuousConvMode=ENABLE 5 ADC1.EOCSelection=ADC_EOC_SEQ_CONV 6 ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,EOCSelection,Overrun,OversamplingMode,RightBitShift,Ratio,NbrOfConversion,ClockPrescaler 7 ADC1.NbrOfConversion=1 8 ADC1.NbrOfConversionFlag=1 9 ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE 10 ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE 11 ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN 12 ADC1.OversamplingMode=ENABLE 13 ADC1.Rank-0\#ChannelRegularConversion=1 14 ADC1.Ratio=1024 15 ADC1.RightBitShift=ADC_RIGHTBITSHIFT_11 16 ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_810CYCLES_5 17 ADC1.master=1 2 ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_VBAT 3 ADC3.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VREFINT 4 ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR 5 ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_10 6 ADC3.ClockPrescalerADC3=ADC_CLOCK_ASYNC_DIV256 7 ADC3.ContinuousConvMode=ENABLE 8 ADC3.DMAContinuousRequests=ENABLE 9 ADC3.EOCSelection=ADC_EOC_SEQ_CONV 10 ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,OversamplingMode,RightBitShift,ClockPrescalerADC3,Ratio,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSign-1\#ChannelRegularConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSign-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSign-3\#ChannelRegularConversion,NbrOfConversion 11 ADC3.NbrOfConversion=4 12 ADC3.NbrOfConversionFlag=1 13 ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE 14 ADC3.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE 15 ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE 16 ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE 17 ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE 18 ADC3.OffsetSign-1\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE 19 ADC3.OffsetSign-2\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE 20 ADC3.OffsetSign-3\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE 21 ADC3.Overrun=ADC_OVR_DATA_OVERWRITTEN 22 ADC3.OversamplingMode=ENABLE 23 ADC3.Rank-0\#ChannelRegularConversion=1 24 ADC3.Rank-1\#ChannelRegularConversion=2 25 ADC3.Rank-2\#ChannelRegularConversion=3 26 ADC3.Rank-3\#ChannelRegularConversion=4 27 ADC3.Ratio=ADC3_OVERSAMPLING_RATIO_256 28 ADC3.RightBitShift=ADC_RIGHTBITSHIFT_11 29 ADC3.SamplingTime-0\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5 30 ADC3.SamplingTime-1\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5 31 ADC3.SamplingTime-2\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5 32 ADC3.SamplingTime-3\#ChannelRegularConversion=ADC3_SAMPLETIME_2CYCLES_5 33 Bdma.ADC3.0.Direction=DMA_PERIPH_TO_MEMORY 34 Bdma.ADC3.0.EventEnable=DISABLE 35 Bdma.ADC3.0.Instance=BDMA_Channel0 36 Bdma.ADC3.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD 37 Bdma.ADC3.0.MemInc=DMA_MINC_ENABLE 38 Bdma.ADC3.0.Mode=DMA_CIRCULAR 39 Bdma.ADC3.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD 40 Bdma.ADC3.0.PeriphInc=DMA_PINC_DISABLE 41 Bdma.ADC3.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING 42 Bdma.ADC3.0.Priority=DMA_PRIORITY_LOW 43 Bdma.ADC3.0.RequestNumber=1 44 Bdma.ADC3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber 45 Bdma.ADC3.0.SignalID=NONE 46 Bdma.ADC3.0.SyncEnable=DISABLE 47 Bdma.ADC3.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT 48 Bdma.ADC3.0.SyncRequestNumber=1 49 Bdma.ADC3.0.SyncSignalID=NONE 50 Bdma.Request0=ADC3 51 Bdma.RequestsNb=1 18 52 CAD.formats=[] 19 53 CAD.pinconfig=Dual … … 26 60 CORTEX_M7.Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_ENABLE 27 61 CORTEX_M7.IPParameters=default_mode_Activation,CPU_ICache,CPU_DCache,Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,DisableExec_S-Cortex_Memory_Protection_Unit_Region1_Settings_S 28 CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_ 128KB62 CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_8KB 29 63 CORTEX_M7.TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_TEX_LEVEL1 30 64 CORTEX_M7.default_mode_Activation=1 31 Dma.ADC1.5.Direction=DMA_PERIPH_TO_MEMORY32 Dma.ADC1.5.EventEnable=DISABLE33 Dma.ADC1.5.FIFOMode=DMA_FIFOMODE_DISABLE34 Dma.ADC1.5.Instance=DMA1_Stream535 Dma.ADC1.5.MemDataAlignment=DMA_MDATAALIGN_HALFWORD36 Dma.ADC1.5.MemInc=DMA_MINC_ENABLE37 Dma.ADC1.5.Mode=DMA_CIRCULAR38 Dma.ADC1.5.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD39 Dma.ADC1.5.PeriphInc=DMA_PINC_DISABLE40 Dma.ADC1.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING41 Dma.ADC1.5.Priority=DMA_PRIORITY_LOW42 Dma.ADC1.5.RequestNumber=143 Dma.ADC1.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber44 Dma.ADC1.5.SignalID=NONE45 Dma.ADC1.5.SyncEnable=DISABLE46 Dma.ADC1.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT47 Dma.ADC1.5.SyncRequestNumber=148 Dma.ADC1.5.SyncSignalID=NONE49 65 Dma.Request0=SPI4_TX 50 66 Dma.Request1=USART3_RX … … 52 68 Dma.Request3=SPI2_RX 53 69 Dma.Request4=SPI2_TX 54 Dma.Request5=ADC1 55 Dma.RequestsNb=6 70 Dma.RequestsNb=5 56 71 Dma.SPI2_RX.3.Direction=DMA_PERIPH_TO_MEMORY 57 72 Dma.SPI2_RX.3.EventEnable=DISABLE … … 247 262 Mcu.CPN=STM32H723ZET6 248 263 Mcu.Family=STM32H7 249 Mcu.IP0=ADC1 250 Mcu.IP1=CORTEX_M7 251 Mcu.IP10=NVIC 252 Mcu.IP11=RCC 253 Mcu.IP12=RTC 254 Mcu.IP13=SDMMC1 255 Mcu.IP14=SPI2 256 Mcu.IP15=SPI4 257 Mcu.IP16=SYS 258 Mcu.IP17=TIM3 259 Mcu.IP18=TIM6 260 Mcu.IP19=TIM8 261 Mcu.IP2=DEBUG 262 Mcu.IP20=USART2 263 Mcu.IP21=USART3 264 Mcu.IP22=USART10 265 Mcu.IP3=DMA 266 Mcu.IP4=FATFS 267 Mcu.IP5=FREERTOS 268 Mcu.IP6=I2C1 269 Mcu.IP7=I2C2 270 Mcu.IP8=MDMA 271 Mcu.IP9=MEMORYMAP 272 Mcu.IPNb=23 264 Mcu.IP0=ADC3 265 Mcu.IP1=BDMA 266 Mcu.IP10=MEMORYMAP 267 Mcu.IP11=NVIC 268 Mcu.IP12=RCC 269 Mcu.IP13=RTC 270 Mcu.IP14=SDMMC1 271 Mcu.IP15=SPI2 272 Mcu.IP16=SPI4 273 Mcu.IP17=SYS 274 Mcu.IP18=TIM3 275 Mcu.IP19=TIM6 276 Mcu.IP2=CORTEX_M7 277 Mcu.IP20=TIM8 278 Mcu.IP21=USART2 279 Mcu.IP22=USART3 280 Mcu.IP23=USART10 281 Mcu.IP3=DEBUG 282 Mcu.IP4=DMA 283 Mcu.IP5=FATFS 284 Mcu.IP6=FREERTOS 285 Mcu.IP7=I2C1 286 Mcu.IP8=I2C2 287 Mcu.IP9=MDMA 288 Mcu.IPNb=24 273 289 Mcu.Name=STM32H723ZETx 274 290 Mcu.Package=LQFP144 … … 326 342 Mcu.Pin55=PB8 327 343 Mcu.Pin56=PB9 328 Mcu.Pin57=VP_ FATFS_VS_SDIO329 Mcu.Pin58=VP_ FREERTOS_VS_CMSIS_V2330 Mcu.Pin59=VP_ RTC_VS_RTC_Activate344 Mcu.Pin57=VP_ADC3_TempSens_Input 345 Mcu.Pin58=VP_ADC3_Vref_Input 346 Mcu.Pin59=VP_ADC3_Vbat_Input 331 347 Mcu.Pin6=PF1 332 Mcu.Pin60=VP_RTC_VS_RTC_Calendar 333 Mcu.Pin61=VP_SYS_VS_tim7 334 Mcu.Pin62=VP_TIM3_VS_ClockSourceINT 335 Mcu.Pin63=VP_TIM6_VS_ClockSourceINT 336 Mcu.Pin64=VP_TIM8_VS_ControllerModeReset 337 Mcu.Pin65=VP_TIM8_VS_ClockSourceINT 338 Mcu.Pin66=VP_MEMORYMAP_VS_MEMORYMAP 339 Mcu.Pin67=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0 348 Mcu.Pin60=VP_FATFS_VS_SDIO 349 Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V2 350 Mcu.Pin62=VP_RTC_VS_RTC_Activate 351 Mcu.Pin63=VP_RTC_VS_RTC_Calendar 352 Mcu.Pin64=VP_SYS_VS_tim7 353 Mcu.Pin65=VP_TIM3_VS_ClockSourceINT 354 Mcu.Pin66=VP_TIM6_VS_ClockSourceINT 355 Mcu.Pin67=VP_TIM8_VS_ControllerModeReset 356 Mcu.Pin68=VP_TIM8_VS_ClockSourceINT 357 Mcu.Pin69=VP_MEMORYMAP_VS_MEMORYMAP 340 358 Mcu.Pin7=PH0-OSC_IN 359 Mcu.Pin70=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0 341 360 Mcu.Pin8=PH1-OSC_OUT 342 361 Mcu.Pin9=PC0 343 Mcu.PinsNb= 68362 Mcu.PinsNb=71 344 363 Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0 345 364 Mcu.ThirdParty1=STMicroelectronics.X-CUBE-EEPRMA1.5.1.0 … … 376 395 MxCube.Version=6.13.0 377 396 MxDb.Version=DB.6.0.130 397 NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 378 398 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 379 399 NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true … … 382 402 NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 383 403 NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 384 NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true385 404 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 386 405 NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true … … 464 483 PB9.Locked=true 465 484 PB9.Signal=GPIO_Output 485 PC0.GPIOParameters=GPIO_Label 486 PC0.GPIO_Label=U_BAT 466 487 PC0.Locked=true 467 488 PC0.Signal=ADCx_INP10 … … 659 680 ProjectManager.UAScriptBeforePath= 660 681 ProjectManager.UnderRoot=true 661 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_ RTC_Init-RTC-false-HAL-true,5-MX_SPI4_Init-SPI4-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C1_Init-I2C1-false-HAL-true,17-MX_I2C2_Init-I2C2-false-HAL-true,18-MX_ADC1_Init-ADC1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true682 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI4_Init-SPI4-false-HAL-true,7-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C2_Init-I2C2-false-HAL-true,17-MX_ADC3_Init-ADC3-false-HAL-true,18-MX_I2C1_Init-I2C1-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true 662 683 RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3 663 684 RCC.ADCFreq_Value=60000000 … … 754 775 SDMMC1.HardwareFlowControl=SDMMC_HARDWARE_FLOW_CONTROL_ENABLE 755 776 SDMMC1.IPParameters=ClockPowerSave,HardwareFlowControl,ClockDiv 756 SH.ADCx_INP10.0=ADC 1_INP10,IN10-Single-Ended777 SH.ADCx_INP10.0=ADC3_INP10,IN10-Single-Ended 757 778 SH.ADCx_INP10.ConfNb=1 758 779 SH.GPXTI8.0=GPIO_EXTI8 … … 834 855 USART3.SwapParam=ADVFEATURE_SWAP_ENABLE 835 856 USART3.VirtualMode-Asynchronous=VM_ASYNC 857 VP_ADC3_TempSens_Input.Mode=IN-TempSens 858 VP_ADC3_TempSens_Input.Signal=ADC3_TempSens_Input 859 VP_ADC3_Vbat_Input.Mode=IN-Vbat 860 VP_ADC3_Vbat_Input.Signal=ADC3_Vbat_Input 861 VP_ADC3_Vref_Input.Mode=IN-Vrefint 862 VP_ADC3_Vref_Input.Signal=ADC3_Vref_Input 836 863 VP_FATFS_VS_SDIO.Mode=SDIO 837 864 VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO
Note: See TracChangeset
for help on using the changeset viewer.