Ignore:
Timestamp:
Feb 14, 2025, 8:27:41 AM (3 months ago)
Author:
Zed
Message:

Fixing project before changing MPU settings in CubeMX.

Location:
ctrl/firmware/Main/CubeMX
Files:
2 added
9 edited

Legend:

Unmodified
Added
Removed
  • ctrl/firmware/Main/CubeMX/Core/Inc/adc.h

    r91 r92  
    3535/* USER CODE END Includes */
    3636
    37 extern ADC_HandleTypeDef hadc1;
     37extern ADC_HandleTypeDef hadc3;
    3838
    3939/* USER CODE BEGIN Private defines */
    4040
    41 #define ADC1_CHANNELS   (1U)
     41#define ADC3_CHANNELS   (4U)
    4242
    43 typedef union ADC1_data_t
     43typedef union ADC3_data_t
    4444{
    45         uint16_t Data[ADC1_CHANNELS];
    46         struct Raw
     45        uint16_t Raw[ADC3_CHANNELS];
     46        struct
    4747        {
    48                 uint16_t U_Bat;
    49         }Raw;
    50 }ADC1_data_t __attribute__((packed, aligned(32)));
     48                uint16_t Vbat;
     49                uint16_t Vref;
     50                uint16_t CPUTemp;
     51                uint16_t UBat;
     52        };
     53} __attribute__((packed, aligned(32))) ADC3_data_t;
    5154
    5255/* USER CODE END Private defines */
    5356
    54 void MX_ADC1_Init(void);
     57void MX_ADC3_Init(void);
    5558
    5659/* USER CODE BEGIN Prototypes */
  • ctrl/firmware/Main/CubeMX/Core/Inc/main.h

    r89 r92  
    6868#define EEPROM_I2C_SCL_Pin GPIO_PIN_1
    6969#define EEPROM_I2C_SCL_GPIO_Port GPIOF
     70#define U_BAT_Pin GPIO_PIN_0
     71#define U_BAT_GPIO_Port GPIOC
    7072#define POWER_4V_EN_Pin GPIO_PIN_15
    7173#define POWER_4V_EN_GPIO_Port GPIOF
  • ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h

    r91 r92  
    5858void DMA1_Stream3_IRQHandler(void);
    5959void DMA1_Stream4_IRQHandler(void);
    60 void DMA1_Stream5_IRQHandler(void);
    6160void EXTI9_5_IRQHandler(void);
    6261void TIM3_IRQHandler(void);
     
    6968void SPI4_IRQHandler(void);
    7069void MDMA_IRQHandler(void);
     70void BDMA_Channel0_IRQHandler(void);
    7171void USART10_IRQHandler(void);
    7272/* USER CODE BEGIN EFP */
  • ctrl/firmware/Main/CubeMX/Core/Src/adc.c

    r91 r92  
    2323/* USER CODE BEGIN 0 */
    2424
    25 ADC1_data_t ADC1_Data;
     25ADC3_data_t ADC3_values         __attribute__((section(".BKP_RAM_4_DMA")));
    2626
    2727/* USER CODE END 0 */
    2828
    29 ADC_HandleTypeDef hadc1;
    30 DMA_HandleTypeDef hdma_adc1;
    31 
    32 /* ADC1 init function */
    33 void MX_ADC1_Init(void)
     29ADC_HandleTypeDef hadc3;
     30DMA_HandleTypeDef hdma_adc3;
     31
     32/* ADC3 init function */
     33void MX_ADC3_Init(void)
    3434{
    3535
    36   /* USER CODE BEGIN ADC1_Init 0 */
    37 
    38   /* USER CODE END ADC1_Init 0 */
    39 
    40   ADC_MultiModeTypeDef multimode = {0};
     36  /* USER CODE BEGIN ADC3_Init 0 */
     37
     38  /* USER CODE END ADC3_Init 0 */
     39
    4140  ADC_ChannelConfTypeDef sConfig = {0};
    4241
    43   /* USER CODE BEGIN ADC1_Init 1 */
    44 
    45   /* USER CODE END ADC1_Init 1 */
     42  /* USER CODE BEGIN ADC3_Init 1 */
     43
     44  /* USER CODE END ADC3_Init 1 */
    4645
    4746  /** Common config
    4847  */
    49   hadc1.Instance = ADC1;
    50   hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256;
    51   hadc1.Init.Resolution = ADC_RESOLUTION_16B;
    52   hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
    53   hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
    54   hadc1.Init.LowPowerAutoWait = DISABLE;
    55   hadc1.Init.ContinuousConvMode = ENABLE;
    56   hadc1.Init.NbrOfConversion = 1;
    57   hadc1.Init.DiscontinuousConvMode = DISABLE;
    58   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
    59   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
    60   hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
    61   hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
    62   hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
    63   hadc1.Init.OversamplingMode = ENABLE;
    64   hadc1.Init.Oversampling.Ratio = 1024;
    65   hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11;
    66   hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
    67   hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
    68   if (HAL_ADC_Init(&hadc1) != HAL_OK)
    69   {
    70     Error_Handler();
    71   }
    72 
    73   /** Configure the ADC multi-mode
    74   */
    75   multimode.Mode = ADC_MODE_INDEPENDENT;
    76   if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
    77   {
    78     Error_Handler();
    79   }
    80 
    81   /** Configure Regular Channel
    82   */
    83   sConfig.Channel = ADC_CHANNEL_10;
     48  hadc3.Instance = ADC3;
     49  hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256;
     50  hadc3.Init.Resolution = ADC_RESOLUTION_12B;
     51  hadc3.Init.DataAlign = ADC3_DATAALIGN_RIGHT;
     52  hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;
     53  hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV;
     54  hadc3.Init.LowPowerAutoWait = DISABLE;
     55  hadc3.Init.ContinuousConvMode = ENABLE;
     56  hadc3.Init.NbrOfConversion = 4;
     57  hadc3.Init.DiscontinuousConvMode = DISABLE;
     58  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
     59  hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
     60  hadc3.Init.DMAContinuousRequests = ENABLE;
     61  hadc3.Init.SamplingMode = ADC_SAMPLING_MODE_NORMAL;
     62  hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
     63  hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
     64  hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
     65  hadc3.Init.OversamplingMode = ENABLE;
     66  hadc3.Init.Oversampling.Ratio = ADC3_OVERSAMPLING_RATIO_256;
     67  hadc3.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11;
     68  hadc3.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
     69  hadc3.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
     70  if (HAL_ADC_Init(&hadc3) != HAL_OK)
     71  {
     72    Error_Handler();
     73  }
     74
     75  /** Configure Regular Channel
     76  */
     77  sConfig.Channel = ADC_CHANNEL_VBAT;
    8478  sConfig.Rank = ADC_REGULAR_RANK_1;
    85   sConfig.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
     79  sConfig.SamplingTime = ADC3_SAMPLETIME_640CYCLES_5;
    8680  sConfig.SingleDiff = ADC_SINGLE_ENDED;
    8781  sConfig.OffsetNumber = ADC_OFFSET_NONE;
    8882  sConfig.Offset = 0;
    89   sConfig.OffsetSignedSaturation = DISABLE;
    90   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
    91   {
    92     Error_Handler();
    93   }
    94   /* USER CODE BEGIN ADC1_Init 2 */
    95 
    96   HAL_StatusTypeDef r = HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&ADC1_Data, ADC1_CHANNELS);
    97   if (r != HAL_OK) printf("Cannot initialize ADC1!\n");
    98   __HAL_DMA_DISABLE_IT(&hdma_adc1, DMA_IT_HT);
    99 
    100   /* USER CODE END ADC1_Init 2 */
     83  sConfig.OffsetSign = ADC3_OFFSET_SIGN_NEGATIVE;
     84  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
     85  {
     86    Error_Handler();
     87  }
     88
     89  /** Configure Regular Channel
     90  */
     91  sConfig.Channel = ADC_CHANNEL_VREFINT;
     92  sConfig.Rank = ADC_REGULAR_RANK_2;
     93  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
     94  {
     95    Error_Handler();
     96  }
     97
     98  /** Configure Regular Channel
     99  */
     100  sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
     101  sConfig.Rank = ADC_REGULAR_RANK_3;
     102  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
     103  {
     104    Error_Handler();
     105  }
     106
     107  /** Configure Regular Channel
     108  */
     109  sConfig.Channel = ADC_CHANNEL_10;
     110  sConfig.Rank = ADC_REGULAR_RANK_4;
     111  sConfig.SamplingTime = ADC3_SAMPLETIME_2CYCLES_5;
     112  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
     113  {
     114    Error_Handler();
     115  }
     116  /* USER CODE BEGIN ADC3_Init 2 */
     117
     118  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED)) Error_Handler();
     119  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED)) Error_Handler();
     120
     121  if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&ADC3_values, 2)) Error_Handler();
     122  __HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT);
     123
     124
     125  /* USER CODE END ADC3_Init 2 */
    101126
    102127}
     
    106131
    107132  GPIO_InitTypeDef GPIO_InitStruct = {0};
    108   if(adcHandle->Instance==ADC1)
    109   {
    110   /* USER CODE BEGIN ADC1_MspInit 0 */
    111 
    112   /* USER CODE END ADC1_MspInit 0 */
    113     /* ADC1 clock enable */
    114     __HAL_RCC_ADC12_CLK_ENABLE();
     133  if(adcHandle->Instance==ADC3)
     134  {
     135  /* USER CODE BEGIN ADC3_MspInit 0 */
     136
     137  /* USER CODE END ADC3_MspInit 0 */
     138    /* ADC3 clock enable */
     139    __HAL_RCC_ADC3_CLK_ENABLE();
    115140
    116141    __HAL_RCC_GPIOC_CLK_ENABLE();
    117     /**ADC1 GPIO Configuration
    118     PC0     ------> ADC1_INP10
     142    /**ADC3 GPIO Configuration
     143    PC0     ------> ADC3_INP10
    119144    */
    120     GPIO_InitStruct.Pin = GPIO_PIN_0;
     145    GPIO_InitStruct.Pin = U_BAT_Pin;
    121146    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    122147    GPIO_InitStruct.Pull = GPIO_NOPULL;
    123     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
    124 
    125     /* ADC1 DMA Init */
    126     /* ADC1 Init */
    127     hdma_adc1.Instance = DMA1_Stream5;
    128     hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
    129     hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    130     hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    131     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
    132     hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
    133     hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
    134     hdma_adc1.Init.Mode = DMA_CIRCULAR;
    135     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    136     hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
    137     if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
     148    HAL_GPIO_Init(U_BAT_GPIO_Port, &GPIO_InitStruct);
     149
     150    /* ADC3 DMA Init */
     151    /* ADC3 Init */
     152    hdma_adc3.Instance = BDMA_Channel0;
     153    hdma_adc3.Init.Request = BDMA_REQUEST_ADC3;
     154    hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY;
     155    hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE;
     156    hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
     157    hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
     158    hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
     159    hdma_adc3.Init.Mode = DMA_CIRCULAR;
     160    hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
     161    if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
    138162    {
    139163      Error_Handler();
    140164    }
    141165
    142     __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
    143 
    144   /* USER CODE BEGIN ADC1_MspInit 1 */
    145 
    146   /* USER CODE END ADC1_MspInit 1 */
     166    __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc3);
     167
     168  /* USER CODE BEGIN ADC3_MspInit 1 */
     169
     170  /* USER CODE END ADC3_MspInit 1 */
    147171  }
    148172}
     
    151175{
    152176
    153   if(adcHandle->Instance==ADC1)
    154   {
    155   /* USER CODE BEGIN ADC1_MspDeInit 0 */
    156 
    157   /* USER CODE END ADC1_MspDeInit 0 */
     177  if(adcHandle->Instance==ADC3)
     178  {
     179  /* USER CODE BEGIN ADC3_MspDeInit 0 */
     180
     181  /* USER CODE END ADC3_MspDeInit 0 */
    158182    /* Peripheral clock disable */
    159     __HAL_RCC_ADC12_CLK_DISABLE();
    160 
    161     /**ADC1 GPIO Configuration
    162     PC0     ------> ADC1_INP10
     183    __HAL_RCC_ADC3_CLK_DISABLE();
     184
     185    /**ADC3 GPIO Configuration
     186    PC0     ------> ADC3_INP10
    163187    */
    164     HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
    165 
    166     /* ADC1 DMA DeInit */
     188    HAL_GPIO_DeInit(U_BAT_GPIO_Port, U_BAT_Pin);
     189
     190    /* ADC3 DMA DeInit */
    167191    HAL_DMA_DeInit(adcHandle->DMA_Handle);
    168   /* USER CODE BEGIN ADC1_MspDeInit 1 */
    169 
    170   /* USER CODE END ADC1_MspDeInit 1 */
     192  /* USER CODE BEGIN ADC3_MspDeInit 1 */
     193
     194  /* USER CODE END ADC3_MspDeInit 1 */
    171195  }
    172196}
  • ctrl/firmware/Main/CubeMX/Core/Src/dma.c

    r91 r92  
    5959  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
    6060  HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
    61   /* DMA1_Stream5_IRQn interrupt configuration */
    62   HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
    63   HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
    6461
    6562}
  • ctrl/firmware/Main/CubeMX/Core/Src/main.c

    r91 r92  
    2121#include "cmsis_os.h"
    2222#include "adc.h"
     23#include "bdma.h"
    2324#include "dma.h"
    2425#include "fatfs.h"
     
    131132  MX_DMA_Init();
    132133  //MX_MDMA_Init();
     134  MX_BDMA_Init();
    133135  MX_RTC_Init();
    134136  MX_SPI4_Init();
    135137  MX_SDMMC1_SD_Init();
    136138  MX_USART3_UART_Init();
    137   MX_TIM3_Init();
    138139  MX_FATFS_Init();
    139140  MX_TIM8_Init();
     
    142143  MX_USART10_UART_Init();
    143144  MX_TIM6_Init();
     145  MX_I2C2_Init();
     146  MX_ADC3_Init();
    144147  MX_I2C1_Init();
    145   MX_I2C2_Init();
    146   MX_ADC1_Init();
     148  MX_TIM3_Init();
    147149  /* USER CODE BEGIN 2 */
    148150
     
    300302  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
    301303  MPU_InitStruct.BaseAddress = 0x24000000;
    302   MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
     304  MPU_InitStruct.Size = MPU_REGION_SIZE_8KB;
    303305  MPU_InitStruct.SubRegionDisable = 0x0;
    304306  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
     
    371373     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
    372374
     375  printf("Wrong parameters value: file %s on line %d\r\n", file, line);
     376
    373377  /* USER CODE END 6 */
    374378}
  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c

    r91 r92  
    6161
    6262/* External variables --------------------------------------------------------*/
    63 extern DMA_HandleTypeDef hdma_adc1;
     63extern DMA_HandleTypeDef hdma_adc3;
    6464extern MDMA_HandleTypeDef hmdma_mdma_channel0_sdmmc1_end_data_0;
    6565extern SD_HandleTypeDef hsd1;
     
    251251
    252252/**
    253   * @brief This function handles DMA1 stream5 global interrupt.
    254   */
    255 void DMA1_Stream5_IRQHandler(void)
    256 {
    257   /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
    258 
    259   /* USER CODE END DMA1_Stream5_IRQn 0 */
    260   HAL_DMA_IRQHandler(&hdma_adc1);
    261   /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
    262 
    263   /* USER CODE END DMA1_Stream5_IRQn 1 */
    264 }
    265 
    266 /**
    267253  * @brief This function handles EXTI line[9:5] interrupts.
    268254  */
     
    406392
    407393  /* USER CODE END MDMA_IRQn 1 */
     394}
     395
     396/**
     397  * @brief This function handles BDMA channel0 global interrupt.
     398  */
     399void BDMA_Channel0_IRQHandler(void)
     400{
     401  /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
     402
     403  /* USER CODE END BDMA_Channel0_IRQn 0 */
     404  HAL_DMA_IRQHandler(&hdma_adc3);
     405  /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
     406
     407  /* USER CODE END BDMA_Channel0_IRQn 1 */
    408408}
    409409
  • ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c

    r91 r92  
    2121uint8_t retSD;                                                                                                                                  /* Return value for SD */
    2222char SDPath[4];                                                                                                                                 /* SD logical drive path */
    23 FATFS SDFatFS     __attribute__((section(".AXI_RAM")));                                                 /* File system object for SD logical drive */
    24 FIL SDFile;                                                                                                                                             /* File object for SD */
     23FATFS SDFatFS     __attribute__((section(".RAM_4_DMA")));                                               /* File system object for SD logical drive */
     24FIL SDFile                __attribute__((section(".RAM_4_DMA")));                                               /* File object for SD */
    2525
    2626/* USER CODE BEGIN Variables */
  • ctrl/firmware/Main/CubeMX/charger.ioc

    r91 r92  
    11#MicroXplorer Configuration settings - do not modify
    2 ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_10
    3 ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV256
    4 ADC1.ContinuousConvMode=ENABLE
    5 ADC1.EOCSelection=ADC_EOC_SEQ_CONV
    6 ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,EOCSelection,Overrun,OversamplingMode,RightBitShift,Ratio,NbrOfConversion,ClockPrescaler
    7 ADC1.NbrOfConversion=1
    8 ADC1.NbrOfConversionFlag=1
    9 ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
    10 ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE
    11 ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
    12 ADC1.OversamplingMode=ENABLE
    13 ADC1.Rank-0\#ChannelRegularConversion=1
    14 ADC1.Ratio=1024
    15 ADC1.RightBitShift=ADC_RIGHTBITSHIFT_11
    16 ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_810CYCLES_5
    17 ADC1.master=1
     2ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_VBAT
     3ADC3.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VREFINT
     4ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR
     5ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_10
     6ADC3.ClockPrescalerADC3=ADC_CLOCK_ASYNC_DIV256
     7ADC3.ContinuousConvMode=ENABLE
     8ADC3.DMAContinuousRequests=ENABLE
     9ADC3.EOCSelection=ADC_EOC_SEQ_CONV
     10ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,OversamplingMode,RightBitShift,ClockPrescalerADC3,Ratio,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSign-1\#ChannelRegularConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSign-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSign-3\#ChannelRegularConversion,NbrOfConversion
     11ADC3.NbrOfConversion=4
     12ADC3.NbrOfConversionFlag=1
     13ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
     14ADC3.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
     15ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
     16ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE
     17ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
     18ADC3.OffsetSign-1\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
     19ADC3.OffsetSign-2\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
     20ADC3.OffsetSign-3\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
     21ADC3.Overrun=ADC_OVR_DATA_OVERWRITTEN
     22ADC3.OversamplingMode=ENABLE
     23ADC3.Rank-0\#ChannelRegularConversion=1
     24ADC3.Rank-1\#ChannelRegularConversion=2
     25ADC3.Rank-2\#ChannelRegularConversion=3
     26ADC3.Rank-3\#ChannelRegularConversion=4
     27ADC3.Ratio=ADC3_OVERSAMPLING_RATIO_256
     28ADC3.RightBitShift=ADC_RIGHTBITSHIFT_11
     29ADC3.SamplingTime-0\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
     30ADC3.SamplingTime-1\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
     31ADC3.SamplingTime-2\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
     32ADC3.SamplingTime-3\#ChannelRegularConversion=ADC3_SAMPLETIME_2CYCLES_5
     33Bdma.ADC3.0.Direction=DMA_PERIPH_TO_MEMORY
     34Bdma.ADC3.0.EventEnable=DISABLE
     35Bdma.ADC3.0.Instance=BDMA_Channel0
     36Bdma.ADC3.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
     37Bdma.ADC3.0.MemInc=DMA_MINC_ENABLE
     38Bdma.ADC3.0.Mode=DMA_CIRCULAR
     39Bdma.ADC3.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
     40Bdma.ADC3.0.PeriphInc=DMA_PINC_DISABLE
     41Bdma.ADC3.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
     42Bdma.ADC3.0.Priority=DMA_PRIORITY_LOW
     43Bdma.ADC3.0.RequestNumber=1
     44Bdma.ADC3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
     45Bdma.ADC3.0.SignalID=NONE
     46Bdma.ADC3.0.SyncEnable=DISABLE
     47Bdma.ADC3.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
     48Bdma.ADC3.0.SyncRequestNumber=1
     49Bdma.ADC3.0.SyncSignalID=NONE
     50Bdma.Request0=ADC3
     51Bdma.RequestsNb=1
    1852CAD.formats=[]
    1953CAD.pinconfig=Dual
     
    2660CORTEX_M7.Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_ENABLE
    2761CORTEX_M7.IPParameters=default_mode_Activation,CPU_ICache,CPU_DCache,Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,DisableExec_S-Cortex_Memory_Protection_Unit_Region1_Settings_S
    28 CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_128KB
     62CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_8KB
    2963CORTEX_M7.TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_TEX_LEVEL1
    3064CORTEX_M7.default_mode_Activation=1
    31 Dma.ADC1.5.Direction=DMA_PERIPH_TO_MEMORY
    32 Dma.ADC1.5.EventEnable=DISABLE
    33 Dma.ADC1.5.FIFOMode=DMA_FIFOMODE_DISABLE
    34 Dma.ADC1.5.Instance=DMA1_Stream5
    35 Dma.ADC1.5.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
    36 Dma.ADC1.5.MemInc=DMA_MINC_ENABLE
    37 Dma.ADC1.5.Mode=DMA_CIRCULAR
    38 Dma.ADC1.5.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
    39 Dma.ADC1.5.PeriphInc=DMA_PINC_DISABLE
    40 Dma.ADC1.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING
    41 Dma.ADC1.5.Priority=DMA_PRIORITY_LOW
    42 Dma.ADC1.5.RequestNumber=1
    43 Dma.ADC1.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
    44 Dma.ADC1.5.SignalID=NONE
    45 Dma.ADC1.5.SyncEnable=DISABLE
    46 Dma.ADC1.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
    47 Dma.ADC1.5.SyncRequestNumber=1
    48 Dma.ADC1.5.SyncSignalID=NONE
    4965Dma.Request0=SPI4_TX
    5066Dma.Request1=USART3_RX
     
    5268Dma.Request3=SPI2_RX
    5369Dma.Request4=SPI2_TX
    54 Dma.Request5=ADC1
    55 Dma.RequestsNb=6
     70Dma.RequestsNb=5
    5671Dma.SPI2_RX.3.Direction=DMA_PERIPH_TO_MEMORY
    5772Dma.SPI2_RX.3.EventEnable=DISABLE
     
    247262Mcu.CPN=STM32H723ZET6
    248263Mcu.Family=STM32H7
    249 Mcu.IP0=ADC1
    250 Mcu.IP1=CORTEX_M7
    251 Mcu.IP10=NVIC
    252 Mcu.IP11=RCC
    253 Mcu.IP12=RTC
    254 Mcu.IP13=SDMMC1
    255 Mcu.IP14=SPI2
    256 Mcu.IP15=SPI4
    257 Mcu.IP16=SYS
    258 Mcu.IP17=TIM3
    259 Mcu.IP18=TIM6
    260 Mcu.IP19=TIM8
    261 Mcu.IP2=DEBUG
    262 Mcu.IP20=USART2
    263 Mcu.IP21=USART3
    264 Mcu.IP22=USART10
    265 Mcu.IP3=DMA
    266 Mcu.IP4=FATFS
    267 Mcu.IP5=FREERTOS
    268 Mcu.IP6=I2C1
    269 Mcu.IP7=I2C2
    270 Mcu.IP8=MDMA
    271 Mcu.IP9=MEMORYMAP
    272 Mcu.IPNb=23
     264Mcu.IP0=ADC3
     265Mcu.IP1=BDMA
     266Mcu.IP10=MEMORYMAP
     267Mcu.IP11=NVIC
     268Mcu.IP12=RCC
     269Mcu.IP13=RTC
     270Mcu.IP14=SDMMC1
     271Mcu.IP15=SPI2
     272Mcu.IP16=SPI4
     273Mcu.IP17=SYS
     274Mcu.IP18=TIM3
     275Mcu.IP19=TIM6
     276Mcu.IP2=CORTEX_M7
     277Mcu.IP20=TIM8
     278Mcu.IP21=USART2
     279Mcu.IP22=USART3
     280Mcu.IP23=USART10
     281Mcu.IP3=DEBUG
     282Mcu.IP4=DMA
     283Mcu.IP5=FATFS
     284Mcu.IP6=FREERTOS
     285Mcu.IP7=I2C1
     286Mcu.IP8=I2C2
     287Mcu.IP9=MDMA
     288Mcu.IPNb=24
    273289Mcu.Name=STM32H723ZETx
    274290Mcu.Package=LQFP144
     
    326342Mcu.Pin55=PB8
    327343Mcu.Pin56=PB9
    328 Mcu.Pin57=VP_FATFS_VS_SDIO
    329 Mcu.Pin58=VP_FREERTOS_VS_CMSIS_V2
    330 Mcu.Pin59=VP_RTC_VS_RTC_Activate
     344Mcu.Pin57=VP_ADC3_TempSens_Input
     345Mcu.Pin58=VP_ADC3_Vref_Input
     346Mcu.Pin59=VP_ADC3_Vbat_Input
    331347Mcu.Pin6=PF1
    332 Mcu.Pin60=VP_RTC_VS_RTC_Calendar
    333 Mcu.Pin61=VP_SYS_VS_tim7
    334 Mcu.Pin62=VP_TIM3_VS_ClockSourceINT
    335 Mcu.Pin63=VP_TIM6_VS_ClockSourceINT
    336 Mcu.Pin64=VP_TIM8_VS_ControllerModeReset
    337 Mcu.Pin65=VP_TIM8_VS_ClockSourceINT
    338 Mcu.Pin66=VP_MEMORYMAP_VS_MEMORYMAP
    339 Mcu.Pin67=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
     348Mcu.Pin60=VP_FATFS_VS_SDIO
     349Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V2
     350Mcu.Pin62=VP_RTC_VS_RTC_Activate
     351Mcu.Pin63=VP_RTC_VS_RTC_Calendar
     352Mcu.Pin64=VP_SYS_VS_tim7
     353Mcu.Pin65=VP_TIM3_VS_ClockSourceINT
     354Mcu.Pin66=VP_TIM6_VS_ClockSourceINT
     355Mcu.Pin67=VP_TIM8_VS_ControllerModeReset
     356Mcu.Pin68=VP_TIM8_VS_ClockSourceINT
     357Mcu.Pin69=VP_MEMORYMAP_VS_MEMORYMAP
    340358Mcu.Pin7=PH0-OSC_IN
     359Mcu.Pin70=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
    341360Mcu.Pin8=PH1-OSC_OUT
    342361Mcu.Pin9=PC0
    343 Mcu.PinsNb=68
     362Mcu.PinsNb=71
    344363Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0
    345364Mcu.ThirdParty1=STMicroelectronics.X-CUBE-EEPRMA1.5.1.0
     
    376395MxCube.Version=6.13.0
    377396MxDb.Version=DB.6.0.130
     397NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    378398NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    379399NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     
    382402NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    383403NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    384 NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    385404NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    386405NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
     
    464483PB9.Locked=true
    465484PB9.Signal=GPIO_Output
     485PC0.GPIOParameters=GPIO_Label
     486PC0.GPIO_Label=U_BAT
    466487PC0.Locked=true
    467488PC0.Signal=ADCx_INP10
     
    659680ProjectManager.UAScriptBeforePath=
    660681ProjectManager.UnderRoot=true
    661 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI4_Init-SPI4-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C1_Init-I2C1-false-HAL-true,17-MX_I2C2_Init-I2C2-false-HAL-true,18-MX_ADC1_Init-ADC1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
     682ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI4_Init-SPI4-false-HAL-true,7-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C2_Init-I2C2-false-HAL-true,17-MX_ADC3_Init-ADC3-false-HAL-true,18-MX_I2C1_Init-I2C1-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
    662683RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3
    663684RCC.ADCFreq_Value=60000000
     
    754775SDMMC1.HardwareFlowControl=SDMMC_HARDWARE_FLOW_CONTROL_ENABLE
    755776SDMMC1.IPParameters=ClockPowerSave,HardwareFlowControl,ClockDiv
    756 SH.ADCx_INP10.0=ADC1_INP10,IN10-Single-Ended
     777SH.ADCx_INP10.0=ADC3_INP10,IN10-Single-Ended
    757778SH.ADCx_INP10.ConfNb=1
    758779SH.GPXTI8.0=GPIO_EXTI8
     
    834855USART3.SwapParam=ADVFEATURE_SWAP_ENABLE
    835856USART3.VirtualMode-Asynchronous=VM_ASYNC
     857VP_ADC3_TempSens_Input.Mode=IN-TempSens
     858VP_ADC3_TempSens_Input.Signal=ADC3_TempSens_Input
     859VP_ADC3_Vbat_Input.Mode=IN-Vbat
     860VP_ADC3_Vbat_Input.Signal=ADC3_Vbat_Input
     861VP_ADC3_Vref_Input.Mode=IN-Vrefint
     862VP_ADC3_Vref_Input.Signal=ADC3_Vref_Input
    836863VP_FATFS_VS_SDIO.Mode=SDIO
    837864VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO
Note: See TracChangeset for help on using the changeset viewer.