Ignore:
Timestamp:
Jan 28, 2025, 4:50:45 PM (3 months ago)
Author:
Zed
Message:

FreeRTOS was added to the project.

Location:
ctrl/firmware/Main/CubeMX
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h

    r70 r72  
    5252void BusFault_Handler(void);
    5353void UsageFault_Handler(void);
    54 void SVC_Handler(void);
    5554void DebugMon_Handler(void);
    56 void PendSV_Handler(void);
    57 void SysTick_Handler(void);
    5855void DMA1_Stream0_IRQHandler(void);
    5956void DMA1_Stream1_IRQHandler(void);
  • ctrl/firmware/Main/CubeMX/Core/Src/dma.c

    r64 r72  
    4545  /* DMA interrupt init */
    4646  /* DMA1_Stream0_IRQn interrupt configuration */
    47   HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
     47  HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
    4848  HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
    4949  /* DMA1_Stream1_IRQn interrupt configuration */
    50   HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
     50  HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
    5151  HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
    5252  /* DMA1_Stream2_IRQn interrupt configuration */
    53   HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
     53  HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
    5454  HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
    5555
  • ctrl/firmware/Main/CubeMX/Core/Src/main.c

    r70 r72  
    1919/* Includes ------------------------------------------------------------------*/
    2020#include "main.h"
     21#include "cmsis_os.h"
    2122#include "dma.h"
    2223#include "memorymap.h"
     
    5960void SystemClock_Config(void);
    6061static void MPU_Config(void);
     62void MX_FREERTOS_Init(void);
    6163/* USER CODE BEGIN PFP */
    6264
     
    125127#undef MX_SDMMC1_SD_Init
    126128  /* USER CODE END 2 */
     129
     130  /* Init scheduler */
     131  osKernelInitialize();
     132
     133  /* Call init function for freertos objects (in cmsis_os2.c) */
     134  MX_FREERTOS_Init();
     135
     136  /* Start scheduler */
     137  osKernelStart();
     138
     139  /* We should never get here as control is now taken by the scheduler */
    127140
    128141  /* Infinite loop */
  • ctrl/firmware/Main/CubeMX/Core/Src/sdmmc.c

    r70 r72  
    106106
    107107    /* SDMMC1 interrupt Init */
    108     HAL_NVIC_SetPriority(SDMMC1_IRQn, 0, 0);
     108    HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0);
    109109    HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
    110110  /* USER CODE BEGIN SDMMC1_MspInit 1 */
  • ctrl/firmware/Main/CubeMX/Core/Src/spi.c

    r51 r72  
    127127
    128128    /* SPI4 interrupt Init */
    129     HAL_NVIC_SetPriority(SPI4_IRQn, 0, 0);
     129    HAL_NVIC_SetPriority(SPI4_IRQn, 5, 0);
    130130    HAL_NVIC_EnableIRQ(SPI4_IRQn);
    131131  /* USER CODE BEGIN SPI4_MspInit 1 */
  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_hal_msp.c

    r47 r72  
    7171
    7272  /* System interrupt init*/
     73  /* PendSV_IRQn interrupt configuration */
     74  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
    7375
    7476  /* USER CODE BEGIN MspInit 1 */
  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c

    r71 r72  
    150150
    151151/**
    152   * @brief This function handles System service call via SWI instruction.
    153   */
    154 void SVC_Handler(void)
    155 {
    156   /* USER CODE BEGIN SVCall_IRQn 0 */
    157 
    158   /* USER CODE END SVCall_IRQn 0 */
    159   /* USER CODE BEGIN SVCall_IRQn 1 */
    160 
    161   /* USER CODE END SVCall_IRQn 1 */
    162 }
    163 
    164 /**
    165152  * @brief This function handles Debug monitor.
    166153  */
     
    173160
    174161  /* USER CODE END DebugMonitor_IRQn 1 */
    175 }
    176 
    177 /**
    178   * @brief This function handles Pendable request for system service.
    179   */
    180 void PendSV_Handler(void)
    181 {
    182   /* USER CODE BEGIN PendSV_IRQn 0 */
    183 
    184   /* USER CODE END PendSV_IRQn 0 */
    185   /* USER CODE BEGIN PendSV_IRQn 1 */
    186 
    187   /* USER CODE END PendSV_IRQn 1 */
    188 }
    189 
    190 /**
    191   * @brief This function handles System tick timer.
    192   */
    193 void SysTick_Handler(void)
    194 {
    195   /* USER CODE BEGIN SysTick_IRQn 0 */
    196 
    197   /* USER CODE END SysTick_IRQn 0 */
    198 
    199   /* USER CODE BEGIN SysTick_IRQn 1 */
    200 
    201   /* USER CODE END SysTick_IRQn 1 */
    202162}
    203163
  • ctrl/firmware/Main/CubeMX/Core/Src/tim.c

    r68 r72  
    162162
    163163    /* TIM3 interrupt Init */
    164     HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
     164    HAL_NVIC_SetPriority(TIM3_IRQn, 5, 0);
    165165    HAL_NVIC_EnableIRQ(TIM3_IRQn);
    166166  /* USER CODE BEGIN TIM3_MspInit 1 */
     
    188188
    189189    /* TIM8 interrupt Init */
    190     HAL_NVIC_SetPriority(TIM8_CC_IRQn, 0, 0);
     190    HAL_NVIC_SetPriority(TIM8_CC_IRQn, 5, 0);
    191191    HAL_NVIC_EnableIRQ(TIM8_CC_IRQn);
    192192  /* USER CODE BEGIN TIM8_MspInit 1 */
  • ctrl/firmware/Main/CubeMX/Core/Src/usart.c

    r65 r72  
    159159
    160160    /* USART3 interrupt Init */
    161     HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
     161    HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
    162162    HAL_NVIC_EnableIRQ(USART3_IRQn);
    163163  /* USER CODE BEGIN USART3_MspInit 1 */
  • ctrl/firmware/Main/CubeMX/charger.ioc

    r70 r72  
    6666Dma.USART3_TX.2.SyncRequestNumber=1
    6767Dma.USART3_TX.2.SyncSignalID=NONE
     68FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark2=1
     69FREERTOS.INCLUDE_xTaskGetHandle=1
     70FREERTOS.IPParameters=Tasks01,configENABLE_FPU,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configRECORD_STACK_HIGH_ADDRESS,configCHECK_FOR_STACK_OVERFLOW,INCLUDE_xTaskGetHandle,INCLUDE_uxTaskGetStackHighWaterMark2
     71FREERTOS.Tasks01=mainTask,24,128,mainTaskStart,Default,NULL,Static,mainTaskBuffer,mainTaskControlBlock
     72FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2
     73FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0
     74FREERTOS.configENABLE_FPU=1
     75FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1
     76FREERTOS.configUSE_TICKLESS_IDLE=1
    6877File.Version=6
    6978GPIO.groupedBy=Group By Peripherals
     
    7584Mcu.IP0=CORTEX_M7
    7685Mcu.IP1=DEBUG
    77 Mcu.IP10=TIM3
    78 Mcu.IP11=TIM8
    79 Mcu.IP12=USART3
     86Mcu.IP10=SYS
     87Mcu.IP11=TIM3
     88Mcu.IP12=TIM8
     89Mcu.IP13=USART3
    8090Mcu.IP2=DMA
    81 Mcu.IP3=MEMORYMAP
    82 Mcu.IP4=NVIC
    83 Mcu.IP5=RCC
    84 Mcu.IP6=RTC
    85 Mcu.IP7=SDMMC1
    86 Mcu.IP8=SPI4
    87 Mcu.IP9=SYS
    88 Mcu.IPNb=13
     91Mcu.IP3=FREERTOS
     92Mcu.IP4=MEMORYMAP
     93Mcu.IP5=NVIC
     94Mcu.IP6=RCC
     95Mcu.IP7=RTC
     96Mcu.IP8=SDMMC1
     97Mcu.IP9=SPI4
     98Mcu.IPNb=14
    8999Mcu.Name=STM32H723ZETx
    90100Mcu.Package=LQFP144
     
    121131Mcu.Pin36=PG13
    122132Mcu.Pin37=PG15
    123 Mcu.Pin38=VP_RTC_VS_RTC_Activate
    124 Mcu.Pin39=VP_SYS_VS_tim7
     133Mcu.Pin38=VP_FREERTOS_VS_CMSIS_V2
     134Mcu.Pin39=VP_RTC_VS_RTC_Activate
    125135Mcu.Pin4=PH1-OSC_OUT
    126 Mcu.Pin40=VP_TIM3_VS_ClockSourceINT
    127 Mcu.Pin41=VP_TIM8_VS_ControllerModeReset
    128 Mcu.Pin42=VP_TIM8_VS_ClockSourceINT
    129 Mcu.Pin43=VP_MEMORYMAP_VS_MEMORYMAP
     136Mcu.Pin40=VP_SYS_VS_tim7
     137Mcu.Pin41=VP_TIM3_VS_ClockSourceINT
     138Mcu.Pin42=VP_TIM8_VS_ControllerModeReset
     139Mcu.Pin43=VP_TIM8_VS_ClockSourceINT
     140Mcu.Pin44=VP_MEMORYMAP_VS_MEMORYMAP
    130141Mcu.Pin5=PF15
    131142Mcu.Pin6=PG0
     
    133144Mcu.Pin8=PE7
    134145Mcu.Pin9=PE11
    135 Mcu.PinsNb=44
     146Mcu.PinsNb=45
    136147Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0
    137148Mcu.ThirdPartyNb=1
     
    140151MxCube.Version=6.13.0
    141152MxDb.Version=DB.6.0.130
    142 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    143 NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
    144 NVIC.DMA1_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
    145 NVIC.DMA1_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
    146 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
     153NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
     154NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     155NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     156NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     157NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    147158NVIC.ForceEnableDMAVector=true
    148 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    149 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    150 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    151 NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
     159NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
     160NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
     161NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
     162NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
    152163NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
    153 NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
    154 NVIC.SPI4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
    155 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    156 NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
    157 NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
    158 NVIC.TIM7_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
    159 NVIC.TIM8_CC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
     164NVIC.SDMMC1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
     165NVIC.SPI4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     166NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
     167NVIC.SavedPendsvIrqHandlerGenerated=true
     168NVIC.SavedSvcallIrqHandlerGenerated=true
     169NVIC.SavedSystickIrqHandlerGenerated=true
     170NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
     171NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
     172NVIC.TIM7_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
     173NVIC.TIM8_CC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
    160174NVIC.TimeBase=TIM7_IRQn
    161175NVIC.TimeBaseIP=TIM7
    162 NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
    163 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
     176NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
     177NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    164178PA13(JTMS/SWDIO).Mode=Serial_Wire
    165179PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
     
    459473USART3.SwapParam=ADVFEATURE_SWAP_ENABLE
    460474USART3.VirtualMode-Asynchronous=VM_ASYNC
     475VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
     476VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
    461477VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
    462478VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
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