Changeset 72 for ctrl/firmware/Main/CubeMX
- Timestamp:
- Jan 28, 2025, 4:50:45 PM (3 months ago)
- Location:
- ctrl/firmware/Main/CubeMX
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h
r70 r72 52 52 void BusFault_Handler(void); 53 53 void UsageFault_Handler(void); 54 void SVC_Handler(void);55 54 void DebugMon_Handler(void); 56 void PendSV_Handler(void);57 void SysTick_Handler(void);58 55 void DMA1_Stream0_IRQHandler(void); 59 56 void DMA1_Stream1_IRQHandler(void); -
ctrl/firmware/Main/CubeMX/Core/Src/dma.c
r64 r72 45 45 /* DMA interrupt init */ 46 46 /* DMA1_Stream0_IRQn interrupt configuration */ 47 HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);47 HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0); 48 48 HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); 49 49 /* DMA1_Stream1_IRQn interrupt configuration */ 50 HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);50 HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0); 51 51 HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); 52 52 /* DMA1_Stream2_IRQn interrupt configuration */ 53 HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);53 HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0); 54 54 HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); 55 55 -
ctrl/firmware/Main/CubeMX/Core/Src/main.c
r70 r72 19 19 /* Includes ------------------------------------------------------------------*/ 20 20 #include "main.h" 21 #include "cmsis_os.h" 21 22 #include "dma.h" 22 23 #include "memorymap.h" … … 59 60 void SystemClock_Config(void); 60 61 static void MPU_Config(void); 62 void MX_FREERTOS_Init(void); 61 63 /* USER CODE BEGIN PFP */ 62 64 … … 125 127 #undef MX_SDMMC1_SD_Init 126 128 /* USER CODE END 2 */ 129 130 /* Init scheduler */ 131 osKernelInitialize(); 132 133 /* Call init function for freertos objects (in cmsis_os2.c) */ 134 MX_FREERTOS_Init(); 135 136 /* Start scheduler */ 137 osKernelStart(); 138 139 /* We should never get here as control is now taken by the scheduler */ 127 140 128 141 /* Infinite loop */ -
ctrl/firmware/Main/CubeMX/Core/Src/sdmmc.c
r70 r72 106 106 107 107 /* SDMMC1 interrupt Init */ 108 HAL_NVIC_SetPriority(SDMMC1_IRQn, 0, 0);108 HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0); 109 109 HAL_NVIC_EnableIRQ(SDMMC1_IRQn); 110 110 /* USER CODE BEGIN SDMMC1_MspInit 1 */ -
ctrl/firmware/Main/CubeMX/Core/Src/spi.c
r51 r72 127 127 128 128 /* SPI4 interrupt Init */ 129 HAL_NVIC_SetPriority(SPI4_IRQn, 0, 0);129 HAL_NVIC_SetPriority(SPI4_IRQn, 5, 0); 130 130 HAL_NVIC_EnableIRQ(SPI4_IRQn); 131 131 /* USER CODE BEGIN SPI4_MspInit 1 */ -
ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_hal_msp.c
r47 r72 71 71 72 72 /* System interrupt init*/ 73 /* PendSV_IRQn interrupt configuration */ 74 HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); 73 75 74 76 /* USER CODE BEGIN MspInit 1 */ -
ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c
r71 r72 150 150 151 151 /** 152 * @brief This function handles System service call via SWI instruction.153 */154 void SVC_Handler(void)155 {156 /* USER CODE BEGIN SVCall_IRQn 0 */157 158 /* USER CODE END SVCall_IRQn 0 */159 /* USER CODE BEGIN SVCall_IRQn 1 */160 161 /* USER CODE END SVCall_IRQn 1 */162 }163 164 /**165 152 * @brief This function handles Debug monitor. 166 153 */ … … 173 160 174 161 /* USER CODE END DebugMonitor_IRQn 1 */ 175 }176 177 /**178 * @brief This function handles Pendable request for system service.179 */180 void PendSV_Handler(void)181 {182 /* USER CODE BEGIN PendSV_IRQn 0 */183 184 /* USER CODE END PendSV_IRQn 0 */185 /* USER CODE BEGIN PendSV_IRQn 1 */186 187 /* USER CODE END PendSV_IRQn 1 */188 }189 190 /**191 * @brief This function handles System tick timer.192 */193 void SysTick_Handler(void)194 {195 /* USER CODE BEGIN SysTick_IRQn 0 */196 197 /* USER CODE END SysTick_IRQn 0 */198 199 /* USER CODE BEGIN SysTick_IRQn 1 */200 201 /* USER CODE END SysTick_IRQn 1 */202 162 } 203 163 -
ctrl/firmware/Main/CubeMX/Core/Src/tim.c
r68 r72 162 162 163 163 /* TIM3 interrupt Init */ 164 HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);164 HAL_NVIC_SetPriority(TIM3_IRQn, 5, 0); 165 165 HAL_NVIC_EnableIRQ(TIM3_IRQn); 166 166 /* USER CODE BEGIN TIM3_MspInit 1 */ … … 188 188 189 189 /* TIM8 interrupt Init */ 190 HAL_NVIC_SetPriority(TIM8_CC_IRQn, 0, 0);190 HAL_NVIC_SetPriority(TIM8_CC_IRQn, 5, 0); 191 191 HAL_NVIC_EnableIRQ(TIM8_CC_IRQn); 192 192 /* USER CODE BEGIN TIM8_MspInit 1 */ -
ctrl/firmware/Main/CubeMX/Core/Src/usart.c
r65 r72 159 159 160 160 /* USART3 interrupt Init */ 161 HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);161 HAL_NVIC_SetPriority(USART3_IRQn, 5, 0); 162 162 HAL_NVIC_EnableIRQ(USART3_IRQn); 163 163 /* USER CODE BEGIN USART3_MspInit 1 */ -
ctrl/firmware/Main/CubeMX/charger.ioc
r70 r72 66 66 Dma.USART3_TX.2.SyncRequestNumber=1 67 67 Dma.USART3_TX.2.SyncSignalID=NONE 68 FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark2=1 69 FREERTOS.INCLUDE_xTaskGetHandle=1 70 FREERTOS.IPParameters=Tasks01,configENABLE_FPU,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configRECORD_STACK_HIGH_ADDRESS,configCHECK_FOR_STACK_OVERFLOW,INCLUDE_xTaskGetHandle,INCLUDE_uxTaskGetStackHighWaterMark2 71 FREERTOS.Tasks01=mainTask,24,128,mainTaskStart,Default,NULL,Static,mainTaskBuffer,mainTaskControlBlock 72 FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2 73 FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0 74 FREERTOS.configENABLE_FPU=1 75 FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1 76 FREERTOS.configUSE_TICKLESS_IDLE=1 68 77 File.Version=6 69 78 GPIO.groupedBy=Group By Peripherals … … 75 84 Mcu.IP0=CORTEX_M7 76 85 Mcu.IP1=DEBUG 77 Mcu.IP10=TIM3 78 Mcu.IP11=TIM8 79 Mcu.IP12=USART3 86 Mcu.IP10=SYS 87 Mcu.IP11=TIM3 88 Mcu.IP12=TIM8 89 Mcu.IP13=USART3 80 90 Mcu.IP2=DMA 81 Mcu.IP3= MEMORYMAP82 Mcu.IP4= NVIC83 Mcu.IP5= RCC84 Mcu.IP6=R TC85 Mcu.IP7= SDMMC186 Mcu.IP8=S PI487 Mcu.IP9=S YS88 Mcu.IPNb=1 391 Mcu.IP3=FREERTOS 92 Mcu.IP4=MEMORYMAP 93 Mcu.IP5=NVIC 94 Mcu.IP6=RCC 95 Mcu.IP7=RTC 96 Mcu.IP8=SDMMC1 97 Mcu.IP9=SPI4 98 Mcu.IPNb=14 89 99 Mcu.Name=STM32H723ZETx 90 100 Mcu.Package=LQFP144 … … 121 131 Mcu.Pin36=PG13 122 132 Mcu.Pin37=PG15 123 Mcu.Pin38=VP_ RTC_VS_RTC_Activate124 Mcu.Pin39=VP_ SYS_VS_tim7133 Mcu.Pin38=VP_FREERTOS_VS_CMSIS_V2 134 Mcu.Pin39=VP_RTC_VS_RTC_Activate 125 135 Mcu.Pin4=PH1-OSC_OUT 126 Mcu.Pin40=VP_TIM3_VS_ClockSourceINT 127 Mcu.Pin41=VP_TIM8_VS_ControllerModeReset 128 Mcu.Pin42=VP_TIM8_VS_ClockSourceINT 129 Mcu.Pin43=VP_MEMORYMAP_VS_MEMORYMAP 136 Mcu.Pin40=VP_SYS_VS_tim7 137 Mcu.Pin41=VP_TIM3_VS_ClockSourceINT 138 Mcu.Pin42=VP_TIM8_VS_ControllerModeReset 139 Mcu.Pin43=VP_TIM8_VS_ClockSourceINT 140 Mcu.Pin44=VP_MEMORYMAP_VS_MEMORYMAP 130 141 Mcu.Pin5=PF15 131 142 Mcu.Pin6=PG0 … … 133 144 Mcu.Pin8=PE7 134 145 Mcu.Pin9=PE11 135 Mcu.PinsNb=4 4146 Mcu.PinsNb=45 136 147 Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0 137 148 Mcu.ThirdPartyNb=1 … … 140 151 MxCube.Version=6.13.0 141 152 MxDb.Version=DB.6.0.130 142 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 143 NVIC.DMA1_Stream0_IRQn=true\: 0\:0\:false\:false\:true\:false\:true\:true144 NVIC.DMA1_Stream1_IRQn=true\: 0\:0\:false\:false\:true\:false\:true\:true145 NVIC.DMA1_Stream2_IRQn=true\: 0\:0\:false\:false\:true\:false\:true\:true146 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 153 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 154 NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 155 NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 156 NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 157 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 147 158 NVIC.ForceEnableDMAVector=true 148 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 149 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 150 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 151 NVIC.PendSV_IRQn=true\: 0\:0\:false\:false\:true\:false\:false\:false159 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 160 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 161 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 162 NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false 152 163 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 153 NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true 154 NVIC.SPI4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true 155 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 156 NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false 157 NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true 158 NVIC.TIM7_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true 159 NVIC.TIM8_CC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true 164 NVIC.SDMMC1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true 165 NVIC.SPI4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true 166 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false 167 NVIC.SavedPendsvIrqHandlerGenerated=true 168 NVIC.SavedSvcallIrqHandlerGenerated=true 169 NVIC.SavedSystickIrqHandlerGenerated=true 170 NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false 171 NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true 172 NVIC.TIM7_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true 173 NVIC.TIM8_CC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true 160 174 NVIC.TimeBase=TIM7_IRQn 161 175 NVIC.TimeBaseIP=TIM7 162 NVIC.USART3_IRQn=true\: 0\:0\:false\:false\:true\:true\:true\:true163 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 176 NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true 177 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false 164 178 PA13(JTMS/SWDIO).Mode=Serial_Wire 165 179 PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO … … 459 473 USART3.SwapParam=ADVFEATURE_SWAP_ENABLE 460 474 USART3.VirtualMode-Asynchronous=VM_ASYNC 475 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 476 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 461 477 VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg 462 478 VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
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