Ignore:
Timestamp:
Feb 4, 2025, 1:58:46 PM (3 months ago)
Author:
Zed
Message:

DHCP client can get IP-address from fritz!box

Location:
ctrl/firmware/Main/CubeMX
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h

    r77 r79  
    5656void DMA1_Stream1_IRQHandler(void);
    5757void DMA1_Stream2_IRQHandler(void);
     58void DMA1_Stream3_IRQHandler(void);
     59void DMA1_Stream4_IRQHandler(void);
    5860void EXTI9_5_IRQHandler(void);
    5961void TIM3_IRQHandler(void);

  • ctrl/firmware/Main/CubeMX/Core/Src/dma.c

    r72 r79  
    5353  HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
    5454  HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
     55  /* DMA1_Stream3_IRQn interrupt configuration */
     56  HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
     57  HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
     58  /* DMA1_Stream4_IRQn interrupt configuration */
     59  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
     60  HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
    5561
    5662}

  • ctrl/firmware/Main/CubeMX/Core/Src/freertos.c

    r74 r79  
    3030
    3131#include "keys_task.h"
     32#include "eth_task.h"
    3233
    3334/* USER CODE END Includes */
    … …  
    4344
    4445#define KEYS_TASK_STACK_DEPTH_WORDS                               (128U)
     46#define ETH_TASK_STACK_DEPTH_WORDS                                (2048U)
    4547
    4648/* USER CODE END PD */
    … …  
    5557
    5658static StackType_t keysTaskStackBuffer[KEYS_TASK_STACK_DEPTH_WORDS]                             __attribute__((section(".DTCM_RAM")));
     59static StackType_t ethTaskStackBuffer[ETH_TASK_STACK_DEPTH_WORDS]                               __attribute__((section(".DTCM_RAM")));
    5760static StaticTask_t keysTaskBuffer;
     61static StaticTask_t ethTaskBuffer;
    5862static const char* const keysTaskName = "ScanKeysTask";
     63static const char* const ethTaskName = "EthTask";
    5964
    6065/* USER CODE END Variables */
    … …  
    141146  if (r == NULL) printf("Cannot create %s!\n", keysTaskName);
    142147
     148  r = xTaskCreateStatic(ethTaskStart, ethTaskName, ETH_TASK_STACK_DEPTH_WORDS, NULL, 25, ethTaskStackBuffer, &ethTaskBuffer);
     149  if (r == NULL) printf("Cannot create %s!\n", ethTaskName);
     150
    143151  /* USER CODE END RTOS_THREADS */
    144152

  • ctrl/firmware/Main/CubeMX/Core/Src/spi.c

    r78 r79  
    2727SPI_HandleTypeDef hspi2;
    2828SPI_HandleTypeDef hspi4;
     29DMA_HandleTypeDef hdma_spi2_rx;
     30DMA_HandleTypeDef hdma_spi2_tx;
    2931DMA_HandleTypeDef hdma_spi4_tx;
    3032
    … …  
    4446  hspi2.Init.Direction = SPI_DIRECTION_2LINES;
    4547  hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
    46   hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
    47   hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
     48  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
     49  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
    4850  hspi2.Init.NSS = SPI_NSS_SOFT;
    4951  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
    … …  
    158160    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
    159161
     162    /* SPI2 DMA Init */
     163    /* SPI2_RX Init */
     164    hdma_spi2_rx.Instance = DMA1_Stream3;
     165    hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX;
     166    hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
     167    hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
     168    hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
     169    hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
     170    hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
     171    hdma_spi2_rx.Init.Mode = DMA_NORMAL;
     172    hdma_spi2_rx.Init.Priority = DMA_PRIORITY_HIGH;
     173    hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
     174    if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
     175    {
     176      Error_Handler();
     177    }
     178
     179    __HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx);
     180
     181    /* SPI2_TX Init */
     182    hdma_spi2_tx.Instance = DMA1_Stream4;
     183    hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX;
     184    hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
     185    hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
     186    hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
     187    hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
     188    hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
     189    hdma_spi2_tx.Init.Mode = DMA_NORMAL;
     190    hdma_spi2_tx.Init.Priority = DMA_PRIORITY_HIGH;
     191    hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
     192    if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
     193    {
     194      Error_Handler();
     195    }
     196
     197    __HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
     198
    160199    /* SPI2 interrupt Init */
    161200    HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
    … …  
    242281    HAL_GPIO_DeInit(GPIOB, ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin);
    243282
     283    /* SPI2 DMA DeInit */
     284    HAL_DMA_DeInit(spiHandle->hdmarx);
     285    HAL_DMA_DeInit(spiHandle->hdmatx);
     286
    244287    /* SPI2 interrupt Deinit */
    245288    HAL_NVIC_DisableIRQ(SPI2_IRQn);

  • ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c

    r77 r79  
    6161/* External variables --------------------------------------------------------*/
    6262extern SD_HandleTypeDef hsd1;
     63extern DMA_HandleTypeDef hdma_spi2_rx;
     64extern DMA_HandleTypeDef hdma_spi2_tx;
    6365extern DMA_HandleTypeDef hdma_spi4_tx;
    6466extern SPI_HandleTypeDef hspi2;
    … …  
    216218
    217219/**
     220  * @brief This function handles DMA1 stream3 global interrupt.
     221  */
     222void DMA1_Stream3_IRQHandler(void)
     223{
     224  /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
     225
     226  /* USER CODE END DMA1_Stream3_IRQn 0 */
     227  HAL_DMA_IRQHandler(&hdma_spi2_rx);
     228  /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
     229
     230  /* USER CODE END DMA1_Stream3_IRQn 1 */
     231}
     232
     233/**
     234  * @brief This function handles DMA1 stream4 global interrupt.
     235  */
     236void DMA1_Stream4_IRQHandler(void)
     237{
     238  /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
     239
     240  /* USER CODE END DMA1_Stream4_IRQn 0 */
     241  HAL_DMA_IRQHandler(&hdma_spi2_tx);
     242  /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
     243
     244  /* USER CODE END DMA1_Stream4_IRQn 1 */
     245}
     246
     247/**
    218248  * @brief This function handles EXTI line[9:5] interrupts.
    219249  */

  • ctrl/firmware/Main/CubeMX/charger.ioc

    r77 r79  
    1111Dma.Request1=USART3_RX
    1212Dma.Request2=USART3_TX
    13 Dma.RequestsNb=3
     13Dma.Request3=SPI2_RX
     14Dma.Request4=SPI2_TX
     15Dma.RequestsNb=5
     16Dma.SPI2_RX.3.Direction=DMA_PERIPH_TO_MEMORY
     17Dma.SPI2_RX.3.EventEnable=DISABLE
     18Dma.SPI2_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE
     19Dma.SPI2_RX.3.Instance=DMA1_Stream3
     20Dma.SPI2_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
     21Dma.SPI2_RX.3.MemInc=DMA_MINC_ENABLE
     22Dma.SPI2_RX.3.Mode=DMA_NORMAL
     23Dma.SPI2_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
     24Dma.SPI2_RX.3.PeriphInc=DMA_PINC_DISABLE
     25Dma.SPI2_RX.3.Polarity=HAL_DMAMUX_REQ_GEN_RISING
     26Dma.SPI2_RX.3.Priority=DMA_PRIORITY_HIGH
     27Dma.SPI2_RX.3.RequestNumber=1
     28Dma.SPI2_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
     29Dma.SPI2_RX.3.SignalID=NONE
     30Dma.SPI2_RX.3.SyncEnable=DISABLE
     31Dma.SPI2_RX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
     32Dma.SPI2_RX.3.SyncRequestNumber=1
     33Dma.SPI2_RX.3.SyncSignalID=NONE
     34Dma.SPI2_TX.4.Direction=DMA_MEMORY_TO_PERIPH
     35Dma.SPI2_TX.4.EventEnable=DISABLE
     36Dma.SPI2_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE
     37Dma.SPI2_TX.4.Instance=DMA1_Stream4
     38Dma.SPI2_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
     39Dma.SPI2_TX.4.MemInc=DMA_MINC_ENABLE
     40Dma.SPI2_TX.4.Mode=DMA_NORMAL
     41Dma.SPI2_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
     42Dma.SPI2_TX.4.PeriphInc=DMA_PINC_DISABLE
     43Dma.SPI2_TX.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
     44Dma.SPI2_TX.4.Priority=DMA_PRIORITY_HIGH
     45Dma.SPI2_TX.4.RequestNumber=1
     46Dma.SPI2_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
     47Dma.SPI2_TX.4.SignalID=NONE
     48Dma.SPI2_TX.4.SyncEnable=DISABLE
     49Dma.SPI2_TX.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
     50Dma.SPI2_TX.4.SyncRequestNumber=1
     51Dma.SPI2_TX.4.SyncSignalID=NONE
    1452Dma.SPI4_TX.0.Direction=DMA_MEMORY_TO_PERIPH
    1553Dma.SPI4_TX.0.EventEnable=DISABLE
    … …  
    248286NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    249287NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     288NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
     289NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
    250290NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
    251291NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
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